STMicroelectronics L6725A

Overview

L6725A from STMicroelectronics is a voltage-mode PWM buck controller for synchronous rectified DC-DC converters, supporting input voltages from 1.8V to 18V and delivering adjustable output down to 0.6V with ±0.8% accuracy over temperature (0°C–125°C). It integrates high-current gate drivers (RHGATE_ON = 1.7Ω, RLGATE_OFF = 0.6Ω), predictive anti-cross-conduction control, dual RDS(on)-based overcurrent protection (peak/valley), and bootstrap anti-discharging-enabling stable 20A+ designs in graphic cards and low-voltage distributed power systems.

For engineers reviewing the L6725A datasheet, L6725A pinout, L6725A application, or L6725A equivalent, key selection considerations include its 250/500 kHz selectable switching frequency, pre-bias startup capability, PGOOD and SYNCH pins (L6725A-exclusive), 0–100% duty cycle support, and dual OCP thresholds set via external resistors on OCH/OCL pins.

Technical Context

The L6725A implements fixed-frequency voltage-mode control with an internal 10 MHz GBWP error amplifier and 5 V/µs slew rate, enabling fast transient response in high-bandwidth buck regulators. Its oscillator supports two discrete frequencies (250 kHz or 500 kHz) selected by analog voltage at EAREF (80–95% of VCCDR for 500 kHz), and it features programmable soft-start with dual-stage current sourcing (35 µA → 10 µA).

Current sensing uses RDS(on) of both high-side and low-side MOSFETs-eliminating sense resistors-with independent peak (OCH) and valley (OCL) current limits. Protection includes overvoltage (117–120% VFB trip), thermal shutdown (150°C ±10°C), hiccup-mode recovery, and predictive dead-time control (20 ns typical) that adapts based on PHASE node voltage during body-diode conduction.

Key Specifications

Pinout & Package

Package: SO16N (16-pin narrow-body SOIC, 1.27 mm pitch, JEDEC MS-012AC).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck controller applications.

Compared with ISL6269CRZ-T and TPS546B24RVFT, the L6725A uniquely combines analog-programmable frequency, RDS(on)-only current sensing, PGOOD/SYNCH pins, and pre-bias startup-making it optimal for high-reliability, analog-controlled multi-phase VRMs where digital overhead is undesirable.

Availability

L6725A is available at Aetrix Electronics and suitable for graphics card VRMs, server CPU core supplies, industrial FPGA power systems, and automotive ADAS domain controllers requiring stable component supply across long production lifecycles.

Supply support for L6725A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, microcontroller, power, and sensor solutions for industrial, automotive, and consumer markets.

The L6725A belongs to ST's high-performance DC-DC controller product line, engineered specifically for synchronous buck topologies in low-voltage, high-current applications such as GPU and CPU voltage regulation modules where precision, reliability, and integration are critical.

FAQ

What is the functional difference between L6725 and L6725A?

The L6725A adds two dedicated pins absent in L6725: PGOOD (open-drain power-good indicator) and SYNCH (master/slave synchronization input). These enable system-level power sequencing and multi-phase interleaving-critical for graphics cards and high-current VRMs. All other electrical characteristics, pinout compatibility, and functional blocks remain identical.

How does the bootstrap anti-discharging system improve performance?

The bootstrap anti-discharging system actively prevents charge leakage from the BOOT capacitor during extended low-duty-cycle operation (e.g., <5% at 500 kHz). This maintains sufficient gate drive voltage for the high-side MOSFET, avoiding shoot-through or dropout-enabling stable regulation down to 0.6V from 1.8V input without external charge-pump circuitry.

Can the L6725A operate with an input voltage below 4.5V?

Yes-the L6725A accepts VIN from 1.8V to 18V-but its VCC supply must remain ≥4.5V for internal circuitry operation. When VIN is low (e.g., 1.8V–4.4V), a separate ≥4.5V bias supply must be applied to VCC. The internal LDO (VCCDR) can be bypassed by shorting VCC to VCCDR if VCC ≈ 5V to avoid dropout-related voltage drop.

What design considerations apply to the EAREF pin voltage selection?

EAREF voltage determines both reference source (internal 0.6V or external 0–2.5V) and switching frequency (250/500 kHz). The voltage is sampled once at UVLO crossing, so it must be stable before VCC reaches 4.2V. An internal 100 kΩ pull-down requires external divider design to account for loading; clamp limits maximum EAREF to 2.5V (typ.) to protect internal circuitry.