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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > DC DC Switching Controllers

STMicroelectronics L6732

Name: L6732
Brand: STMicroelectronics
SKU: L6732
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: L6732

Manufacturer:: STMicroelectronics

Category:: DC DC Switching Controllers

Package:: 16-PowerTSSOP (0.173", 4.40mm Width)

Datasheet:: L6732.pdf

Description:: IC REG CTRLR BUCK 16TSSOP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

L6732 from STMicroelectronics is an adjustable synchronous step-down DC-DC controller IC designed for high-current, high-efficiency buck converters driving N-channel MOSFETs. It supports input voltage from 1.8 V to 14 V, regulates output down to 0.6 V with ±0.8 % accuracy over −40 °C to +125 °C, and delivers up to 20 A output current using external power stages. Key confirmed parameters include 250/500 kHz selectable switching frequency, <100 ns minimum on-time, predictive anti-cross-conduction control, and R_DS(on)-based high-side/low-side current sensing.

For engineers reviewing the L6732 datasheet, L6732 pinout, L6732 application, or L6732 equivalent, this controller is selected for precision low-voltage regulation in DDR memory supplies, graphic card VRMs, niPoL converters, and high-density DC-DC modules where tight output tolerance, pre-bias startup, and phase-synchronized multi-phase operation are required.

Technical Context

The L6732 implements fixed-frequency voltage-mode PWM control with a 10 MHz gain-bandwidth error amplifier and 5 V/µs slew rate, enabling fast transient response in high-bandwidth converters. Its oscillator supports dual-frequency selection (250 kHz / 500 kHz) via analog voltage at EAREF, and it integrates an internal 5 V LDO (VCCDR) for gate drivers - bypassable when VCC ≈ 5 V to avoid dropout loss.

Current protection uses valley sensing (OCL pin) and peak sensing (OCH pin), each programmable via external resistors, eliminating sense resistors while supporting independent high-side/low-side R_DS(on) monitoring. Predictive dead-time control reduces cross-conduction by dynamically adjusting based on PHASE node voltage, with adaptive fallback during body-diode conduction.

Key Specifications

Parameter	Value and Actual Design Meaning
Input Voltage Range	1.8 V to 14 V - enables direct regulation from Li-ion battery packs, intermediate bus rails, or wide-input industrial supplies.
Output Voltage Accuracy	±0.8 % over line, load, and temperature (−40 °C to +125 °C) - ensures stable DDR termination and GPU core voltage compliance.
Switching Frequency	Selectable 250 kHz or 500 kHz - balances efficiency vs. size: 250 kHz for lower EMI and higher efficiency; 500 kHz for smaller magnetics and faster transient response.
Min On-Time (T_ON,MIN)	<100 ns - supports ultra-low duty-cycle operation (e.g., 0.6 V out from 12 V in = 5 % duty) at 500 kHz without pulse-skipping.
Gate Drive Capability	High-side R_ON = 1.7 Ω, Low-side R_ON = 1.15 Ω - drives multiple parallel MOSFETs with fast edge rates and minimal driver loss.
Current Sensing Method	R_DS(on)-based high-side (OCH) and low-side (OCL) sensing - eliminates current-sense resistors, improves efficiency, and enables dual-threshold OCP.
Soft-Start Behavior	Programmable via SS capacitor; constant-current mode during startup; supports pre-biased output - prevents reverse current flow and ensures reliable cold-start in multi-rail systems.

Pinout & Package

Package: HTSSOP16 with exposed thermal pad - provides low thermal resistance (R_thJA = 50 °C/W) for high-power density layouts in space-constrained applications like graphics cards and server DIMMs.

Pin/Terminal	Circuit Role	Design Meaning
1 PGOOD	Open-drain power-good indicator	Pulled low if V_OUT deviates >±10 % from setpoint - used for system sequencing and fault reporting in DDR and GPU power trees.
2 SYNCH	Master/slave synchronization input	Enables 180° phase-shifted multi-phase operation with other L6732s - reduces input/output ripple and improves thermal distribution in multi-phase VRMs.
4 FB	Inverting input of error amplifier	Connects to output via resistor divider; senses regulated voltage and triggers OVP/UVLO - reference point for all feedback and protection functions.
6 SS/INH	Soft-start timing and inhibit control	Capacitor-programmed ramp; <0.5 V disables device - enables controlled startup, pre-bias handling, and system-level enable/disable logic.
7 EAREF	Reference select and frequency programming	Analog voltage sets internal 0.6 V ref or external ref (0–2.5 V); also selects 250/500 kHz - single-pin configuration of key operating modes.
10 PHASE	High-side source return and current sense node	Connects to HS MOSFET source; monitors voltage drop across both MOSFETs for R_DS(on) current sensing - critical for valley/peak OCP accuracy.
11 HGATE	High-side gate driver output	Drives HS MOSFET gate with bootstrap-supplied voltage - requires external BOOT capacitor and diode for floating high-side drive.
14 LGATE	Low-side gate driver output	Drives LS MOSFET gate from VCCDR rail - optimized for fast turn-on/turn-off with low R_ON/R_OFF.
15 VCCDR	Internally regulated 5 V supply	Stable 5 V output (4.5–5.5 V) for gate drivers and internal circuitry - must be decoupled with ≥1 µF ceramic cap near pin.
16 VCC	Main supply input	4.5 V to 14 V input powering internal LDO and logic - UVLO thresholds at 3.8 V (off) and 4.2 V (on) ensure clean power-up.

Key Features

Feature	Design Value
Predictive anti-cross-conduction control	Dynamically adjusts dead time based on PHASE node voltage (threshold −350 mV), reducing shoot-through risk while maintaining <20 ns dead time - improves efficiency and reliability in high-frequency buck stages.
Programmable R_DS(on) over-current protection	Separate OCH (peak) and OCL (valley) pins allow independent setting of high-side and low-side current limits via external resistors - eliminates sense resistors and supports asymmetric current handling in multi-MOSFET designs.
Pre-bias startup capability	Soft-start only sources current until completion; sinks current only after startup - prevents reverse current into pre-charged outputs (e.g., DDR VDDQ rails), avoiding damage or latch-up.
Master/slave synchronization with 180° phase shift	SIMPLE wire-OR connection of SYNCH pins enables precise interleaving - cuts input capacitor RMS current by ~30 % and output voltage ripple by ~50 % in dual-phase configurations.
External reference support (0–2.5 V)	EAREF pin accepts external voltage reference up to 2.5 V, enabling custom output voltages beyond 0.6 V while retaining full protection and regulation - useful for ASIC core supplies requiring non-standard rails.

Applications

DDR Memory Supply

Graphics Card VRM

Use Scenario: Regulating VDDQ (1.25 V) and VPP (2.5 V) rails for DDR4/DDR5 memory subsystems in servers and workstations.

IC Role / Device Role / Timing Role: Primary synchronous buck controller managing fast load transients, tight voltage tolerance, and multi-phase coordination.

Use Value: ±0.8 % output accuracy and 500 kHz operation ensure stable memory interface timing under dynamic read/write loads; pre-bias startup avoids data corruption during warm reset.

Use Scenario: High-current core voltage regulation (0.8–1.2 V) for discrete GPUs in gaming and AI accelerators.

IC Role / Device Role / Timing Role: Multi-phase controller driving paralleled N-channel MOSFETs with phase-interleaved switching.

Use Value: 180° SYNCH capability enables dual-phase operation that halves input ripple current and improves thermal spreading across PCB - critical for sustained 300+ W GPU power delivery.

niPoL Converters

High-Density DC-DC Modules

Use Scenario: Point-of-load conversion in telecom baseband units and FPGA carrier boards requiring compact, efficient 3.3 V → 1.0 V conversion.

IC Role / Device Role / Timing Role: Adjustable buck controller with integrated drivers and R_DS(on) sensing - replaces discrete gate drivers and current sense components.

Use Value: Elimination of current-sense resistors saves board area and improves efficiency; <100 ns min on-time supports high-frequency operation in ultra-compact modules.

Use Scenario: Embedded DC-DC modules for industrial PLCs and medical imaging systems needing stable, low-noise 5 V or 3.3 V rails.

IC Role / Device Role / Timing Role: Main controller for isolated or non-isolated buck modules with thermal shutdown, OVP, and PGOOD signaling.

Use Value: Integrated protections (OVP, thermal shutdown, hiccup-mode OCP) reduce BOM count and improve field reliability; HTSSOP16 package enables module heights <2.5 mm.

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck controller applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ISL6269 (Renesas)	Fixed 0.6 V reference only; no external reference support; 300 kHz/600 kHz frequencies; lower accuracy (±1.0 %).	Lacks EAREF-based external reference flexibility and pre-bias startup - less suitable for multi-rail DDR systems requiring custom voltages or hot-plug operation.	Choose ISL6269 only when fixed 0.6 V output and simpler design are prioritized over accuracy and configurability.
TPS54620 (Texas Instruments)	Integrated FETs (30 A); no external R_DS(on) sensing; uses current-sense resistor; 2% output accuracy; no master/slave sync.	Monolithic solution trades flexibility for simplicity - unsuitable for >30 A or high-efficiency discrete MOSFET designs requiring R_DS(on) sensing.	Choose TPS54620 for cost-sensitive, medium-current applications where layout simplicity outweighs efficiency and multi-phase scalability.

Compared with ISL6269 and TPS54620, the L6732 uniquely combines ±0.8 % accuracy, external reference support, R_DS(on) current sensing, and 180° phase-sync - making it optimal for high-performance, multi-phase, low-voltage applications demanding precision and scalability.

Availability

L6732 is available at Aetrix Electronics and suitable for DDR memory supplies, graphics card VRMs, and high-density DC-DC modules requiring stable component supply, long-term lifecycle support, and traceable sourcing for production programs.

Supply support for L6732 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, microcontrollers, and analog ICs for industrial, automotive, and consumer markets.

The L6732 belongs to ST's high-performance DC-DC controller product line, engineered specifically for synchronous buck topologies in computing, graphics, and telecommunications where precision regulation, thermal robustness, and multi-phase scalability are essential.

FAQ

What is the minimum output voltage achievable with the L6732, and how is accuracy maintained?

The L6732 achieves a minimum regulated output voltage of 0.6 V with ±0.8 % accuracy across −40 °C to +125 °C, verified per Table 6 in the datasheet. This is enabled by its trimmed internal 0.6 V reference and high-precision error amplifier (10 MHz GBWP, 5 V/µs slew rate), which maintains loop stability and tight regulation even under fast load transients and wide input variations.

How does the L6732 handle pre-biased output conditions during startup?

The L6732 supports pre-bias startup by sourcing current only during soft-start (via SS pin ramp) and disabling low-side sink capability until soft-start completes. This prevents reverse current flow into an already charged output rail - confirmed in Figure 8 and Section 5.6, making it suitable for DDR and multi-rail systems where VDDQ may retain residual voltage during warm resets.

Can the L6732 synchronize with controllers from other manufacturers?

No - the L6732's SYNCH pin implements a proprietary master/slave protocol requiring identical devices for 180° phase-shifted operation. It does not support industry-standard SYNC protocols (e.g., PMBus clock sync or external clock injection), and inter-manufacturer synchronization is not specified or guaranteed in the datasheet.

What thermal derating guidance applies to the HTSSOP16 package in continuous 20 A operation?

With R_thJA = 50 °C/W and maximum junction temperature of +125 °C, the L6732 in HTSSOP16 requires ≤2.5 W total power dissipation for safe operation at 85 °C ambient. At 20 A output, this mandates careful PCB layout: 2 oz copper, thermal vias under the exposed pad, and airflow - consistent with the 20 A demo board design in Section 7.1 of the datasheet.

L6732 Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: -

Package/Case:: 16-PowerTSSOP (0.173", 4.40mm Width)

Packaging:: Tube

Product Status:: Active

Output Type:: Transistor Driver

Function:: Step-Down

Output Configuration:: Positive

Topology:: Buck

Number of Outputs:: 1

Output Phases:: 1

Voltage - Supply (Vcc/Vdd):: 4.5V ~ 14V

Frequency - Switching:: 250kHz, 500kHz

Duty Cycle (Max):: 100%

Synchronous Rectifier:: Yes

Clock Sync:: Yes

Serial Interfaces:: -

Control Features:: Current Limit, Enable, Phase Control, Power Good, Soft Start

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-HTSSOP

L6732 FAQ

1.How can I place an order for L6732 through Aetrix?

Please submit a Request for Quotation (RFQ) for L6732 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for L6732 reliable?

The price and inventory of L6732 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for L6732 is usually 5 days.

3.What payment methods are accepted for L6732?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for L6732 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for L6732?

L6732 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your L6732 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for L6732?

For technical support, including L6732 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your L6732 requirements.

6.How does Aetrix verify that L6732 is sourced from the original manufacturer or authorized distributors?

All L6732 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that L6732 meets industry standards.

7.What is the process for return or replacement of L6732?

All L6732 units undergo pre-shipment inspection (PSI). If there is an issue with L6732, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The L6732 part is unused and in its original packaging.

Return procedure for L6732:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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