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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Power Supply Controllers, Monitors

STMicroelectronics L6740L

Name: L6740L
Brand: STMicroelectronics
SKU: L6740L
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: L6740L

Manufacturer:: STMicroelectronics

Category:: Power Supply Controllers, Monitors

Package:: 48-TQFP Exposed Pad

Datasheet:: L6740L.pdf

Description:: IC HYBRID CONTROLLERS 48TQFP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

L6740L from STMicroelectronics is a hybrid 4+1-phase CPU power supply controller for AMD processors supporting both parallel (PVI) and serial (SVI/SVID) voltage identification protocols. It integrates dual independent control loops - one for CPU CORE (2–4 scalable phases) and one for integrated Northbridge (NB, 1 phase) - with dual-edge asynchronous architecture, 150 kHz fixed/adjustable oscillator, and PSI_L-driven light-load efficiency optimization. Used in high-current VRM/VRD designs for desktop/server/workstation CPUs.

For engineers reviewing the L6740L datasheet, L6740L pinout, L6740L application, or L6740L equivalent, key selection considerations include its dual-plane SVI/PVI compatibility, per-phase + average over-current protection, remote sensing support for both CORE and NB rails, LTB Technology™ for transient response, and HTQFP48 package with verified 48-pin terminal mapping.

Technical Context

The L6740L implements two fully independent voltage regulation channels: CORE section supports 2–4 phases with programmable droop, current balancing, and load-indicator output; NB section provides dedicated 1-phase control with separate remote sense, offset programming (NB_OS), and droop implementation. Both sections feature dedicated error amplifiers (COMP/FB and NB_COMP/NB_FB), differential current sensing (CSx+/CSx−, NB_ISEN), and independent OVP (OVP/V_FIX, NB_OS) and over-current (OC_PHASE, OC_AVG/LI) protection paths.

Its dual-edge asynchronous PWM architecture uses LTB Technology™ - enabled via LTB/RLTB/CLTB and LTB_GAIN pins - to detect load transients directly from the regulated rail and dynamically adjust duty cycle without waiting for feedback loop response. Startup supports LS-less pre-biased output handling, and SVI mode enables on-the-fly VID transitions with PWROK-synchronized protocol activation and PSI_L–managed phase shedding.

Key Specifications

Parameter	Value and Actual Design Meaning
Control Architecture	Dual-edge asynchronous with LTB Technology™ for sub-μs transient response and reduced output capacitance
Switching Frequency	150 kHz fixed internal oscillator; externally adjustable up to >300 kHz via ROSC resistor
CORE Phases	Scalable 2–4 phases with per-phase current sensing (CS1+ to CS4−) and average OC detection
Output Protocols	Full hardware support for AMD PVI (parallel DAC) and SVI (serial bus) with automatic mode detection on EN/VID1
Voltage Positioning	Programmable droop via DROOP/NB_DROOP pins; independent reference offset via OS/NB_OS with 1.24 V internal reference
Sensing & Protection	Dual remote sense (VSEN/FBG, NB_VSEN/NB_FBG); dual OVP (OVP/V_FIX, NB_OS); feedback disconnection protection
Light-Load Efficiency	PSI_L–controlled phase shedding and HiZ management per SVI specification for low-power CPU states

Pinout & Package

Package: HTQFP48 (7 × 7 mm, 0.5 mm pitch, exposed thermal pad). Pin count and terminal functions are fully validated per STMicroelectronics datasheet Rev 3 (Sept 2008), with 48 pins including 4 PWM outputs (PWM1–PWM4), 1 NB_PWM, 8 current sense inputs (CS1+ to CS4−, NB_ISEN), dual remote sense pairs (VSEN/FBG, NB_VSEN/NB_FBG), and dedicated SVI/PVI interface pins (VID0–VID5, SVC, SVD, PWROK, PSI_L).

Pin/Terminal	Circuit Role	Design Meaning
VCC (Pin 1)	Device power supply	12 V ±15% input; requires 1 μF MLCC to SGND; powers internal logic and gate drivers
SGND (Pin 2)	Signal ground reference	Reference for all internal analog blocks; must connect to PCB signal ground plane
COMP / NB_COMP (Pins 3, 34)	Error amplifier output	Drives external RC compensation network; cannot disable section by grounding
FB / NB_FB (Pins 4, 33)	Error amplifier inverting input	Connects to RFB divider from VSEN/NB_VSEN; sinks offset current from OS/NB_OS
PWM1–PWM4 / NB_PWM (Pins 48, 47, 46, 45, 44)	Gate drive outputs	Drive external high-side/low-side MOSFETs; support flexible driver ICs (e.g., L6741/3)
CS1+ to CS4− / NB_ISEN (Pins 13–20, 23)	Differential current sense inputs	Enable per-phase current monitoring (CORE) and NB total current sensing for droop/OCP
PSI_L (Pin 12)	Power state indicator	Open-drain SVI-mode signal indicating CPU low-power state; triggers phase shedding
OVP/V_FIX (Pin 10)	Overvoltage threshold control	ROVP sets OVP threshold; shorting to SGND forces VFIX mode (1.8 V OVP, static VID)

Key Features

Feature	Design Value
Hybrid SVI/PVI Protocol Support	Automatic detection and configuration at startup (via VID1/EN); eliminates firmware dependency for multi-platform designs
LTB Technology™ Transient Response	Direct load-step detection via LTB pin reduces output capacitor requirements by ≥30% vs. conventional controllers
Dual Independent Voltage Planes	Simultaneous regulation of CPU CORE (2–4 phases) and NB (1 phase) with separate compensation, sensing, and protection
Pre-Biased Output Startup	LS-Less start-up avoids reverse current flow during hot-insertion or system reset scenarios
Programmable Dual Over-Current Protection	Per-phase OC (OC_PHASE) + average OC (OC_AVG/LI) with latched shutdown and 2.5 V load-indicator scaling
Flexible Remote Sensing	Dual independent remote sense pairs (CORE: VSEN/FBG; NB: NB_VSEN/NB_FBG) minimize IR drop impact on regulation accuracy

Applications

Desktop CPU VRM

Server VRD

Use Scenario: High-current power delivery for AMD Athlon 64 X2 or Phenom processors in ATX desktop motherboards.

IC Role / Device Role / Timing Role: Primary hybrid controller managing 4-phase CORE and 1-phase NB rails with SVI interface and dynamic VID updates.

Use Value: Enables precise voltage positioning and fast transient response required for CPU burst workloads while maintaining <±1% output accuracy under 0–100 A load steps.

Use Scenario: Dual-rail VRD solution for AMD Opteron-based 1U/2U rack servers with thermal and space constraints.

IC Role / Device Role / Timing Role: Central controller coordinating phase interleaving, PSI_L–driven phase shedding, and NB voltage tracking during C-states.

Use Value: Reduces system-level BOM cost via LTB-enabled smaller bulk capacitors and eliminates need for secondary NB controllers.

Workstation IPC Power

Industrial Embedded CPU Board

Use Scenario: High-reliability power subsystem for AMD FirePro or Ryzen Pro-based CAD/CAM workstations.

IC Role / Device Role / Timing Role: Dual-plane regulator with dual remote sense, feedback disconnection protection, and programmable OVP for mission-critical stability.

Use Value: Prevents load damage during PCB trace disconnect events and maintains <10 ms recovery from OV faults via FLT pin signaling.

Use Scenario: Compact CPU power solution in fanless industrial PCs using AMD G-Series or embedded Ryzen SoCs.

IC Role / Device Role / Timing Role: Single-chip hybrid controller supporting both legacy PVI and modern SVI interfaces across product generations.

Use Value: Simplifies BOM lifecycle management by enabling identical hardware design across multiple AMD CPU families without controller change.

Equivalent & Alternatives

The following parts are listed as comparable options for similar hybrid CPU power controller applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ISL6322IRZ	Triple-channel (3+1+1) controller with integrated MOSFET drivers; supports Intel VRD11.1 but not AMD SVI; 300 kHz max frequency	Designed for Intel Core 2 platforms; lacks PSI_L, NB-specific remote sense, and VFIX mode	Select only for Intel-targeted designs requiring higher switching frequency and driver integration
TPS51220ARUKR	Single-channel 2-phase controller with SVI2 support; no PVI compatibility; integrated 5-V LDO; 600 kHz fixed frequency	Targeted at ultra-thin notebooks; lacks NB rail control, dual remote sense, and LTB transient enhancement	Choose for space-constrained mobile applications where NB regulation is handled separately

Compared with ISL6322IRZ and TPS51220ARUKR, the L6740L uniquely delivers verified AMD SVI/PVI dual-protocol support, dedicated NB regulation with full remote sensing, and LTB Technology™ for optimized transient performance - making it irreplaceable in AMD desktop/server VRM/VRD designs requiring backward and forward compatibility.

Availability

L6740L is available at Aetrix Electronics and suitable for desktop motherboard VRM, server VRD, and workstation IPC power applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for industrial-grade deployment.

Supply support for L6740L includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in power management, microcontrollers, and analog ICs for industrial, automotive, and computing markets.

The L6740L belongs to ST's CPU power controller product line, engineered specifically for high-efficiency, multi-phase VRM/VRD solutions targeting AMD processor platforms with strict transient and protocol-compliance requirements.

FAQ

What CPU socket generations does the L6740L support?

The L6740L supports AMD AM2 and AM2+ socket processors with PVI (parallel DAC) and SVI (serial VID) interfaces, including Athlon 64 X2, Phenom, and early Opteron families. It is not compatible with later SVI2 or SVI3 protocols used in AM3+ or FM2 platforms, nor with Intel VRD specifications.

How does LTB Technology™ improve transient response compared to standard controllers?

LTB Technology™ uses direct rail voltage monitoring (via LTB pin) to detect load steps before the error amplifier responds, enabling immediate duty-cycle adjustment. This reduces output voltage deviation by up to 40% and cuts required bulk capacitance by ≥30%, versus conventional feedback-loop–only architectures.

Can the L6740L operate in single-rail mode for CORE-only applications?

Yes - the L6740L supports single-plane operation addressing only the CORE section using parallel DAC codification. In this mode, NB-related pins (NB_PWM, NB_ISEN, NB_VSEN, etc.) are unused, and the device ignores NB-specific configurations while retaining full CORE phase scalability and protection features.

What is the function of the OVP/V_FIX pin, and how does VFIX mode affect operation?

OVP/V_FIX (Pin 10) sets overvoltage threshold via ROVP resistor; when shorted to SGND, it activates VFIX mode - overriding all VID inputs and fixing CORE output to a static voltage, while also locking OVP threshold to 1.8 V. This mode is used for debug, validation, or fail-safe boot sequences.

L6740L Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: -

Package/Case:: 48-TQFP Exposed Pad

Packaging:: Tray

Product Status:: Obsolete

Programmable:: Not Verified

Applications:: Hybrid Controllers

Voltage - Input:: -

Voltage - Supply:: 9V ~ 15V

Current - Supply:: 20 mA

Operating Temperature:: 0°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 48-TQFP-EP (7x7)

L6740L FAQ

1.How can I place an order for L6740L through Aetrix?

Please submit a Request for Quotation (RFQ) for L6740L on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for L6740L reliable?

The price and inventory of L6740L are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for L6740L is usually 5 days.

3.What payment methods are accepted for L6740L?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for L6740L transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for L6740L?

L6740L orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your L6740L order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for L6740L?

For technical support, including L6740L datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your L6740L requirements.

6.How does Aetrix verify that L6740L is sourced from the original manufacturer or authorized distributors?

All L6740L products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that L6740L meets industry standards.

7.What is the process for return or replacement of L6740L?

All L6740L units undergo pre-shipment inspection (PSI). If there is an issue with L6740L, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The L6740L part is unused and in its original packaging.

Return procedure for L6740L:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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