Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > DC DC Switching Controllers

STMicroelectronics L6910A

Name: L6910A
Brand: STMicroelectronics
SKU: L6910A
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: L6910A

Manufacturer:: STMicroelectronics

Category:: DC DC Switching Controllers

Package:: 16-PowerTSSOP (0.173", 4.40mm Width)

Datasheet:: L6910A.pdf

Description:: IC REG CTRLR BUCK 16TSSOP

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:2,811

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

L6910A from STMicroelectronics is a voltage-mode PWM controller IC for synchronous buck DC-DC converters, designed to regulate output voltages down to 0.9 V ±1.5% from 5–12 V input buses. It integrates high-current gate drivers (1.3 A high-side source, 1.1 A low-side source), adjustable switching frequency (50 kHz–1 MHz), hiccup-mode overcurrent protection, and power-good signaling. Used in memory supply and add-on card power rails where fast transient response and precise low-voltage regulation are critical.

For engineers reviewing the L6910A datasheet, L6910A pinout, L6910A application, or L6910A equivalent, key selection considerations include its 0%–100% duty cycle capability, internal 0.9 V reference accuracy, bootstrap-based high-side drive architecture, and R_DS(on)-based current sensing without external shunt resistors.

Technical Context

The L6910A implements voltage-mode PWM control with a 10 MHz gain-bandwidth error amplifier and 10 V/µs slew rate, enabling high-loop bandwidth for sub-microsecond load transient recovery. Its oscillator supports both fixed 200 kHz operation and external resistor-adjustable frequency (50 kHz–1 MHz) via the OSC pin, with built-in overvoltage crowbar action that forces LGATE high during fault conditions.

Protection logic includes adaptive hiccup-mode overcurrent response triggered by R_DS(on) monitoring at the PHASE node, plus overvoltage shutdown with PGOOD assertion and OSC pin clamping above 3 V. The EAREF pin accepts external references (0.9–3.0 V) or connects directly to the internal 0.9 V ±1.5% reference, with shutdown activation below 650 mV.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage Range	5 V to 12 V - powers controller logic and low-side driver directly; exceeds typical 3.3 V/5 V rail limits for high-bus applications.
Output Voltage Accuracy	0.9 V ±1.5% - enables stable DDR memory termination and low-core-voltage FPGA I/O rails without external trimming.
Switching Frequency	50 kHz to 1 MHz - adjustable via RT resistor; higher frequencies reduce inductor size but increase switching loss.
Gate Drive Current	1.3 A high-side source / 1.1 A low-side source - drives multiple parallel N-MOSFETs with minimal dead-time-induced shoot-through risk.
Overcurrent Sensing	R_DS(on)-based, no sense resistor - eliminates power loss and board space for current-sense components in high-current designs.
Duty Cycle Range	0% to 100% - supports full input-to-output voltage conversion range, including 12 V → 0.9 V step-down without dropout.
Power-Good Threshold	±10% window (88–112% of setpoint) - provides reliable system enable/disable signaling for downstream logic sequencing.

Pinout & Package

Package: HTSSOP16 (exposed pad), thermally enhanced for high-power DC-DC controller operation; 0.65 mm pitch, RoHS-compliant.

Pin/Terminal	Circuit Role	Design Meaning
VREF	Internal reference output	Provides 0.9 V ±1.5% reference; requires ≥1 nF ceramic capacitor; forces hiccup mode if pulled below 0.63 V.
OSC	Oscillator frequency control	Fixed 200 kHz when open; frequency adjusted via RT-to-GND (↑freq) or RT-to-VCC (↓freq); stops oscillation if 50 µA forced in.
OCSET	Overcurrent threshold setting	Sinks 200 µA constant current; sets current limit via external resistor tied to upper MOS drain and R_DS(on).
SS/INH	Soft-start timing & disable input	10 µA internal charge current; device disabled when voltage < 0.4 V; also discharges SS cap during UVLO events.
COMP	Error amplifier output	Drives external compensation network; 0.5–4 V swing; interfaces with PWM comparator for duty-cycle generation.
FB	Feedback input	Inverting input of error amp; monitors output via resistor divider; triggers PGOOD and OVP protection.
GND	Analog ground reference	Reference for all internal analog blocks; must connect to clean PCB signal ground plane.
EAREF	Error amp non-inverting input	Accepts 0.9–3.0 V external reference or shorted to VREF; shuts down if < 650 mV (typ).
PGOOD	Open-drain status output	Pulled low when FB voltage outside ±10%; floats when valid; used for system power sequencing.
PHASE	High-side switch node monitor	Returns path for high-side driver; senses upper MOS V_DS for R_DS(on)-based current limiting and dead-time control.
HGATE	High-side gate driver output	Bootstrap-supplied; 1.3 A peak source/sink; drives gate of upper N-MOSFET in synchronous buck stage.
BOOT	Bootstrap supply input	Connected via capacitor to PHASE and diode to VCC; generates floating supply for HGATE driver.
PGND	Power ground	Low-side MOS source return; must tie closely to power ground plane to minimize noise coupling into control circuitry.
LGATE	Low-side gate driver output	Directly VCC-supplied; 1.1 A peak source, 1.3 A sink; drives lower N-MOSFET with adaptive dead-time control.
VCC	Main supply input	5–12 V operating range; powers internal logic, low-side driver, and BOOT diode anode; not rated >15 V absolute max.
N.C.	No-connect terminal	Not internally bonded; may float or tie to GND for mechanical stability; no electrical function.

Key Features

Feature	Design Value
Adjustable 0.9 V reference	Enables direct regulation of DDR2/DDR3 termination voltages and low-V_CCIO FPGA supplies without external DAC or trim.
Voltage-mode PWM control	Supports wide input/output ratios and stable loop compensation using standard Type II/III networks with predictable phase margin.
Hiccup-mode overcurrent protection	Prevents thermal runaway during sustained overload by cycling soft-start; allows automatic recovery without system reset.
Bootstrap high-side drive	Eliminates need for isolated gate drive supply; supports high-side N-MOSFETs in cost-sensitive, space-constrained buck designs.
R_DS(on)-based current sensing	Removes sense resistor losses and layout sensitivity; maintains accuracy across temperature with proper MOSFET R_DS(on) derating.

Applications

Memory Power Supply

Computer Add-On Card

Use Scenario: Providing regulated 1.2 V or 1.5 V supply to DDR SDRAM modules on server motherboards.

IC Role / Device Role / Timing Role: Primary synchronous buck controller managing voltage regulation, transient response, and power sequencing.

Use Value: Delivers ±1.5% output accuracy and sub-10 µs load-step recovery to maintain memory timing margins under dynamic access patterns.

Use Scenario: Generating 3.3 V or 1.8 V rails for PCIe expansion cards with variable power draw.

IC Role / Device Role / Timing Role: Standalone step-down controller driving discrete N-MOSFETs in compact, thermally constrained card-edge layouts.

Use Value: Enables high-efficiency conversion from 12 V auxiliary bus while supporting hiccup-mode fault containment during hot-plug events.

Low-Voltage Distributed DC-DC

Mag-Amp Replacement

Use Scenario: Local point-of-load regulation in telecom line cards requiring 0.9–1.8 V outputs at up to 20 A.

IC Role / Device Role / Timing Role: Core PWM controller interfacing with external power stage and feedback network for distributed power architecture.

Use Value: Supports 0%–100% duty cycle and 1 MHz max switching to minimize inductor volume in dense backplane designs.

Use Scenario: Replacing magnetic amplifier post-regulators in isolated flyback-derived 3.3 V/5 V supplies.

IC Role / Device Role / Timing Role: Secondary-side synchronous rectification controller eliminating mag-amp core losses and improving light-load efficiency.

Use Value: Achieves >90% efficiency at 20% load versus <75% for mag-amps, with faster transient response and no saturation risk.

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck controller applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
TPS40210	Current-mode control; 4.5–20 V input; integrated 1.5 A gate drivers; no internal reference; requires external VREF.	Better suited for wide-input industrial supplies; lacks integrated 0.9 V reference and hiccup-mode OCP.	Select when current-mode stability and higher input voltage tolerance outweigh need for internal reference simplicity.
ISL6263	Voltage-mode control; 5–24 V input; 2 A gate drivers; 0.6 V reference; supports dual-phase interleaving.	Targets higher-current notebook CPU VRMs; adds phase control not needed in single-rail memory supplies.	Choose for multi-phase scalability and tighter 0.6 V reference, but expect higher BOM cost and complexity than L6910A's single-phase simplicity.

Compared with TPS40210 and ISL6263, the L6910A offers optimal balance for single-phase, low-voltage memory rails: integrated 0.9 V ±1.5% reference eliminates external components, hiccup-mode OCP simplifies fault handling, and HTSSOP16 package delivers superior thermal performance per mm² versus SO-16 alternatives.

Availability

L6910A is available at Aetrix Electronics and suitable for memory power supply, computer add-on card, and low-voltage distributed DC-DC applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.

Supply support for L6910A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, microcontrollers, and analog ICs for industrial, automotive, and computing markets.

The L6910A belongs to ST's high-performance DC-DC controller product line, engineered specifically for synchronous buck topologies in memory, graphics, and add-in card power systems demanding precision, speed, and robust fault protection.

FAQ

What is the minimum output voltage achievable with the L6910A?

The L6910A supports a minimum regulated output voltage of 0.9 V ±1.5% when using the internal reference (EAREF tied to VREF). With an external reference applied to EAREF, voltages as low as 0.9 V are supported, but accuracy depends on the external reference's tolerance and temperature drift. No design supports sub-0.9 V regulation without external amplification.

How does the L6910A implement overcurrent protection without a sense resistor?

The L6910A uses the R_DS(on) of the high-side MOSFET as the current-sensing element. A constant 200 µA current is sunk from the OCSET pin through an external resistor connected between OCSET and the MOSFET's drain. The resulting voltage drop across the MOSFET's channel is compared against this reference to trigger hiccup-mode shutdown when current exceeds the calculated threshold.

Can the L6910A operate with a 3.3 V input supply?

No. The L6910A requires a minimum VCC supply of 4.0 V (typical turn-on threshold) and is specified for operation only from 5 V to 12 V. A 3.3 V rail cannot power the controller directly; a pre-regulator or charge-pump booster would be required to meet the 5 V minimum, which contradicts the device's intended use case on higher-bus systems.

What is the purpose of the N.C. pin on the HTSSOP16 package?

The N.C. (No Connect) pin on the L6910A HTSSOP16 package is not internally bonded and serves no electrical function. It may be left floating or connected to GND for mechanical reinforcement or thermal relief, but it must never be used as a signal or power connection. Its presence aligns with package mold compatibility across ST's controller family.

L6910A Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: -

Package/Case:: 16-PowerTSSOP (0.173", 4.40mm Width)

Packaging:: Tray

Product Status:: Obsolete

Output Type:: Transistor Driver

Function:: Step-Down

Output Configuration:: Positive

Topology:: Buck

Number of Outputs:: 1

Output Phases:: 1

Voltage - Supply (Vcc/Vdd):: 5V ~ 12V

Frequency - Switching:: 200kHz

Duty Cycle (Max):: 100%

Synchronous Rectifier:: Yes

Clock Sync:: No

Serial Interfaces:: -

Control Features:: Current Limit, Frequency Control, Phase Control, Power Good, Soft Start

Operating Temperature:: -40°C ~ 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-HTSSOP

L6910A FAQ

1.How can I place an order for L6910A through Aetrix?

Please submit a Request for Quotation (RFQ) for L6910A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for L6910A reliable?

The price and inventory of L6910A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for L6910A is usually 5 days.

3.What payment methods are accepted for L6910A?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for L6910A transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for L6910A?

L6910A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your L6910A order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for L6910A?

For technical support, including L6910A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your L6910A requirements.

6.How does Aetrix verify that L6910A is sourced from the original manufacturer or authorized distributors?

All L6910A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that L6910A meets industry standards.

7.What is the process for return or replacement of L6910A?

All L6910A units undergo pre-shipment inspection (PSI). If there is an issue with L6910A, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The L6910A part is unused and in its original packaging.

Return procedure for L6910A:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…