STMicroelectronics L6910GTR

Overview

L6910GTR from STMicroelectronics is a voltage-mode PWM synchronous buck controller IC designed for high-performance DC-DC conversion from 5V–12V input buses. It delivers adjustable output down to 0.9V ±1.5%, supports 0–100% duty cycle, integrates 1.3A high-side and 1.1A low-side gate drivers, and features hiccup-mode overcurrent protection and power-good signaling - used in memory supply and add-on card power rails.

For engineers reviewing the L6910GTR datasheet, L6910GTR pinout, L6910GTR application, or L6910GTR equivalent, key selection criteria include its 200kHz–1MHz externally adjustable oscillator, internal 0.9V reference with 1nF bypass requirement, SO-16 narrow package layout, and synchronous rectification support for >20A output current capability.

Technical Context

The L6910GTR implements voltage-mode PWM control with a 10MHz gain-bandwidth error amplifier and 10V/µs slew rate to enable fast load transient response. Its oscillator frequency is set via external RT resistor (50kHz–1MHz), and it uses MOSFET r_DS(on) sensing - not a shunt - for overcurrent detection at the PHASE pin.

Protection logic includes overvoltage crowbar action (activating LGATE during OVP), soft-start capacitor discharge on fault, and adaptive dead-time control between HGATE and LGATE to prevent shoot-through. The EAREF pin accepts 0.9V–3V external references or connects to VREF for internal regulation.

Key Specifications

Pinout & Package

Package: SO-16 narrow (3.9mm width), surface-mount, RoHS-compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck controller applications.

Compared with TPS40200DR and ISL6208CRZ, the L6910GTR uniquely combines internal 0.9V ±1.5% reference, SO-16 integration, and r_DS(on)-based OCP - making it optimal for cost-sensitive, space-constrained 5V/12V bus-fed POL converters where reference accuracy and layout simplicity are critical.

Availability

L6910GTR is available at Aetrix Electronics and suitable for memory power supply, PCI add-on card rail, and distributed low-voltage DC-DC applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for L6910GTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in power management, analog, microcontrollers, and automotive ICs.

The L6910GTR belongs to ST's high-performance DC-DC controller product line, engineered specifically for synchronous buck topologies in computing and communications infrastructure where precision regulation, fast transient response, and robust protection are mandatory.

FAQ

What is the minimum output voltage achievable with the L6910GTR?

The L6910GTR achieves a minimum regulated output voltage of 0.9V ±1.5% using its internal reference when EAREF is shorted to VREF. With an external reference up to 3V applied to EAREF, the output can be set higher via feedback divider, but the lowest guaranteed regulation point remains 0.9V due to reference tolerance and error amplifier headroom constraints.

How does the OCSET pin implement overcurrent protection without a sense resistor?

The OCSET pin sinks a precise 200µA current to develop a voltage across an external resistor connected between OCSET and the upper MOSFET's drain. This voltage is compared against the drop across the MOSFET's r_DS(on) (measured at PHASE), enabling current-limit detection without a discrete sense resistor - reducing BOM count and power loss.

Can the L6910GTR operate with 100% duty cycle, and what design considerations apply?

Yes, the L6910GTR supports true 0–100% duty cycle operation, enabling dropout-free regulation at high input-to-output ratios. To sustain 100% conduction, the bootstrap capacitor must be sized to maintain sufficient HGATE drive voltage during extended on-time; PHASE must remain well below VCC, and LGATE must stay off to prevent shoot-through.

What is the role of the EAREF pin, and what happens if it is left unconnected?

The EAREF pin is the non-inverting input of the internal error amplifier and must be driven with either the internal 0.9V reference (by shorting to VREF) or an external 0.9–3V reference. If left floating, its internal 300kΩ pull-down forces shutdown; if voltage drops below 650mV, the device disables immediately - ensuring fail-safe behavior under reference fault conditions.