STMicroelectronics L6935TR

Overview

L6935TR from STMicroelectronics is an ultra-low-dropout (ULDO) linear regulator IC featuring an internal N-channel MOSFET, 3 A continuous output current capability, adjustable output voltage (0.5 V to 3.0 V), ±1 % regulation accuracy over temperature, and split bias/power supply architecture enabling efficient low-voltage conversion (e.g., VIN as low as 0.75 V with VBIAS ≥ VIN). It is used for core I/O and memory power delivery in mobile computing platforms.

For engineers reviewing the L6935TR datasheet, L6935TR pinout, L6935TR application, or L6935TR equivalent, key selection criteria include its 60 mΩ max R_DS(on), programmable soft-start via external capacitor, open-drain Power Good flag, 3.5 A overcurrent protection threshold, and thermal shutdown at 150 °C with 20 °C hysteresis.

Technical Context

The L6935TR implements a charge-pump–assisted error amplifier driving an internal N-channel DMOS pass transistor, enabling operation with input voltages as low as 0.75 V when VBIAS ≥ VIN. Its split-bias architecture decouples logic supply (VBIAS, up to 5 V) from power path (VIN), minimizing conduction loss while maintaining gate drive integrity.

Regulation is achieved via a precision 0.500 V internal reference and external resistive divider on the ADJ pin. Protection functions-including non-latching 3.5 A current limiting, thermal shutdown with hysteresis, and open-drain PGOOD with 90 % trip threshold and 10 % hysteresis-are fully integrated and operate without external components.

Key Specifications

Pinout & Package

VFQFPN20 package (4.0 mm × 4.0 mm × 1.0 mm, 20-pin, exposed thermal pad); RoHS-compliant ECOPACK® with lead-free interconnect.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ultra-low-dropout linear regulator applications.

Compared with TPS7A8300RGRT and ADM7172ACPZ-R7, the L6935TR uniquely combines 3 A output, 0.5–3.0 V adjustability, split-bias operation for <0.75 V VIN, and 60 mΩ R_DS(on)-making it the only option qualified for high-current, low-drop, thermally sensitive mobile PC and chipset applications.

Availability

L6935TR is available at Aetrix Electronics and suitable for motherboard power delivery, mobile PC I/O regulation, and handheld instrument analog supply requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for L6935TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog products for automotive, industrial, and consumer markets.

The L6935TR belongs to ST's high-performance ULDO linear regulator product line, engineered specifically for low-voltage, high-current power delivery in space-constrained mobile and embedded computing systems where thermal efficiency and sequencing reliability are critical.

FAQ

What is the minimum input voltage (VIN) the L6935TR can regulate from?

The L6935TR supports VIN as low as 0.75 V when VBIAS ≥ VIN and VOUT is set to 0.5 V. This is enabled by its split-bias architecture: VBIAS supplies the gate driver independently, allowing the internal N-MOSFET to remain fully enhanced even when VIN is near VOUT. At higher output voltages (e.g., 1.8 V), minimum VIN is VOUT + V_DROP(min), where V_DROP depends on load current and R_DS(on).

How is output voltage adjusted, and what tolerance does the feedback network introduce?

Output voltage is set using a two-resistor divider from VOUT to GND, with the ADJ pin connected to the midpoint. The formula is V_OUT = 0.5 V × (1 + R1/R2). The internal 0.500 V reference has ±0.8 % initial tolerance and ±1 % total accuracy over temperature and line/load. Resistor tolerance directly adds to overall output error; using 0.1 % R1 and R2 yields ±0.2 % additional error at room temperature.

Does the L6935TR require an external capacitor on the SS pin for stable operation?

Yes-the SS pin must be connected to GND via an external capacitor (CSS) for functional soft-start. Without CSS, the output rises immediately upon enable, risking inrush current into large output capacitance and potential input rail collapse. Typical values range from 10 nF (≈5 ms ramp) to 100 nF (≈50 ms); the exact value is selected based on system sequencing requirements and output capacitance size.

Can the PGOOD pin drive a microcontroller GPIO directly?

Yes-PGOOD is an open-drain output rated for 6 V maximum and capable of sinking ≥2 mA. It can directly interface with 3.3 V or 5 V microcontroller GPIOs using a pull-up resistor (typically 10 kΩ) to the same supply as the MCU's I/O domain. The pin asserts low during soft-start and when VOUT drops below 90 % of the programmed value, providing unambiguous power-status signaling without level-shifting.