My Inquiry
My Account
STMicroelectronics L6986
- Part No.:
- L6986
- Manufacturer:
- STMicroelectronics
- Package:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
L6986.pdf
- Description:
- IC REG BUCK ADJ 2A 16HTSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,261
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
L6986 from STMicroelectronics is a 38 V, 2 A synchronous step-down switching regulator featuring peak current mode control, adjustable 250 kHz–2 MHz switching frequency, 30 μA quiescent current in low-consumption mode (LCM), and embedded output voltage supervisor with open-drain RST for microcontroller reset sequencing. It operates from 4 V to 38 V input, delivers adjustable output from 0.85 V to VIN, and targets industrial power rails in PLCs and decentralized sensor nodes.
For engineers reviewing the L6986 datasheet, L6986 pinout, L6986 application, or L6986 equivalent, key selection criteria include its dual-mode operation (LCM/LNM), 100% duty cycle capability via P-channel high-side MOSFET, thermal shutdown at 165 °C, integrated current limiting with pulse-by-pulse sensing, and HTSSOP16 package with exposed pad for thermal management.
Technical Context
The L6986 implements a peak current mode architecture with transconductance error amplifier (Gm = 85–210 μS) and internal sawtooth oscillator. Its soft-start is controlled by an external capacitor on SS/INH pin, charged by a 1–4 μA current source, generating a reference ramp with 3× gain relative to the pin voltage.
It supports two distinct operating modes: Low Noise Mode (LNM) enforces constant-frequency PWM across load range for EMI-sensitive applications, while Low Consumption Mode (LCM) enables discontinuous conduction mode at light load to achieve 30 μA IQ. Switchover functionality allows VBIAS to supply part of the internal circuitry when connected to regulated output, reducing VIN-referred quiescent current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4 V to 38 V - supports 5 V, 12 V, and 24 V industrial bus systems without external pre-regulation. |
| Output Current | 2 A DC - sufficient for powering microcontrollers, FPGAs, and analog signal chains in compact industrial modules. |
| Quiescent Current (LCM) | 30 μA at light load (VOUT = 3.3 V) - extends battery life or enables always-on operation in low-power sensor nodes. |
| Switching Frequency | 250 kHz to 2 MHz - selectable via resistor on FSW pin; higher frequencies reduce external inductor/capacitor size. |
| Output Voltage Range | 0.85 V to VIN - enables generation of core logic voltages (e.g., 1.2 V, 1.8 V, 3.3 V) and bias supplies from wide-input sources. |
| RDS(on) HS / LS | 180 mΩ / 150 mΩ - minimizes conduction loss and improves full-load efficiency in thermally constrained designs. |
| Thermal Shutdown | 165 °C with 30 °C hysteresis - protects IC and PCB during overload or poor heatsinking conditions. |
Pinout & Package
Package: HTSSOP16 (exposed pad), RthJA = 40 °C/W (on ST demo board), requires exposed pad soldered to SGND/PGND for thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RST | Open-collector reset output | Asserts low when VOUT falls below programmed threshold; used for µC/FPGA power-good signaling and sequencing. |
| VCC | Internal analog supply rail | Requires ≥470 nF ceramic capacitor; powers bandgap reference and error amplifier. |
| SS/INH | Soft-start timing & inhibit control | Charged by internal current source (1–4 μA); clamp to GND disables regulator. |
| SYNCH | Master/slave synchronization input | Accepts external clock in LNM; floating in LCM; supports up to 6 slave devices. |
| FSW | Switching frequency selection | Resistor divider to VCC/GND sets fSW before soft-start; enables 250 kHz–2 MHz tuning. |
| MLF | Mode and RST threshold selection | Straps LNM/LCM and selects RST trip point (80–96% of VOUT) via resistor to VCC/GND. |
| COMP | Error amplifier output | Connects to external compensation network (type II or III) for loop stability. |
| DELAY | RST assertion delay timing | Capacitor value sets delay time after VOUT exceeds threshold before RST releases. |
| FB | Feedback node | Inverting input of error amplifier; senses output via resistive divider referenced to 0.85 V internal reference. |
| SGND / PGND | Signal / Power ground | Separate ground pins minimize noise coupling between analog control and power switching paths. |
| LX | Switching node | Connects to external inductor; carries high di/dt; requires tight layout and Kelvin connection to PGND. |
| VIN | Main power input | Accepts 4–38 V; internal UVLO ensures safe startup above 2.7 V (rising) and shutdown below 2.5 V (falling). |
| VBIAS | Switchover auxiliary supply | Connect to regulated output (3–5.5 V) to reduce VIN-referred IQ; internal switchover occurs at ~3.05 V. |
Key Features
| Feature | Design Value |
|---|---|
| Peak current mode control | Enables fast transient response and inherent cycle-by-cycle overcurrent protection without external sense resistor. |
| Dual operating modes (LCM/LNM) | LCM maximizes light-load efficiency; LNM guarantees fixed-frequency operation for predictable EMI filtering. |
| Embedded output voltage supervisor | Programmable RST output with adjustable delay and threshold enables reliable power-up sequencing for digital loads. |
| 100% duty cycle capability | P-channel high-side MOSFET allows VOUT ≈ VIN – dropout, critical for low-voltage-drop applications near input rail. |
| Synchronous rectification | Integrated N-channel low-side MOSFET eliminates external Schottky diode, improving efficiency at medium/heavy loads. |
Applications
| Industrial PLC Power Supply | Decentralized Sensor Node |
|---|---|
Use Scenario: Powering CPU, I/O isolators, and communication interfaces in modular programmable logic controllers operating from 24 V DC bus. IC Role / Device Role / Timing Role: Primary buck regulator delivering stable 3.3 V/2 A to microcontroller and peripherals; RST output sequences FPGA configuration after power-up. Use Value: Wide 4–38 V input accommodates bus fluctuations; LCM mode maintains <30 μA IQ during standby, reducing system idle power. | Use Scenario: Compact, low-noise power stage for battery- or energy-harvesting–powered environmental sensors with wireless telemetry. IC Role / Device Role / Timing Role: Step-down converter generating 1.8 V for ultra-low-power MCU and 3.3 V for RF transceiver; MLF pin configures 93% RST threshold for robust brownout detection. Use Value: 2 MHz switching enables <1 μH inductor; LNM mode ensures clean spectral profile for co-located RF circuits. |
| Programmable Logic Controller (PLC) Backplane | Low-Noise Analog Signal Chain |
Use Scenario: Distributed power conversion on PLC backplane where multiple L6986 units synchronize to common clock to avoid beat frequencies. IC Role / Device Role / Timing Role: Synchronized buck regulator in master/slave topology; SYNCH pin driven by system clock generator to align switching edges. Use Value: Synchronization reduces conducted EMI peaks and simplifies EMI filter design across multi-rail systems. | Use Scenario: Powering precision ADCs, op-amps, and reference buffers in industrial data acquisition modules requiring minimal supply ripple. IC Role / Device Role / Timing Role: Low-noise buck regulator operating in LNM mode with 500 kHz fixed frequency; COMP pin compensated for high PSRR at 100 kHz. Use Value: Constant-frequency operation avoids subharmonic noise; 30 μA IQ in LCM preserves battery runtime during measurement sleep cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5164QPWPRQ1 | 4.5–65 V input, 1 A output, 14 μA IQ, no integrated LDO or RST supervisor | Lacks embedded voltage supervisor and soft-start programmability; requires external reset IC for sequencing | Select when wider input range and automotive AEC-Q100 qualification are required, and sequencing is handled externally. |
| TPS54202DDCR | 4.5–28 V input, 2 A output, 26 μA IQ, integrated MOSFETs but no RST or DELAY pin | No output voltage supervision or programmable reset delay; uses external feedback divider only | Choose for cost-sensitive industrial applications where basic regulation suffices and sequencing is not required. |
Compared with LM5164QPWPRQ1 and TPS54202DDCR, the L6986 uniquely integrates output voltage supervision with adjustable RST threshold and delay, dual LCM/LNM operation for optimized light-load and noise performance, and 100% duty cycle support-making it ideal for space-constrained, sequenced, and low-idle-power industrial systems.
Availability
L6986 is available at Aetrix Electronics and suitable for industrial automation, programmable logic controllers (PLCs), and decentralized sensor nodes requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for L6986 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, and analog/mixed-signal devices for industrial, automotive, and consumer markets.
The L6986 belongs to ST's high-voltage synchronous buck regulator product line, engineered specifically for rugged industrial power conversion where wide input range, low quiescent current, and integrated supervision features are essential.
FAQ
What is the purpose of the VBIAS pin on the L6986?
The VBIAS pin enables switchover functionality: when connected to a regulated output voltage (3–5.5 V), it supplies part of the internal circuitry, reducing the quiescent current drawn from VIN. This lowers total system power consumption, especially in LCM mode, where VIN-referred IQ drops from ~70 μA to ~10 μA when VBIAS = 3.3 V.
How does the L6986 implement output voltage sequencing?
Sequencing is achieved using the RST open-collector output and DELAY pin. When VOUT rises above the threshold set by MLF pinstrapping, the internal comparator triggers a timer based on the capacitor at DELAY. After the programmed delay, RST is released, signaling downstream devices (e.g., µC, FPGA) that power is stable-enabling controlled power-up order without external supervisors.
Can the L6986 operate with 100% duty cycle, and how is this achieved?
Yes-the L6986 achieves 100% duty cycle using a P-channel MOSFET as the high-side switch. Unlike N-channel-based regulators requiring bootstrap circuitry, the P-channel device can remain fully enhanced even when VOUT approaches VIN, enabling dropout voltages as low as tens of millivolts and supporting applications like post-regulation from unregulated 12 V or 24 V rails.
What are the key differences between Low Noise Mode (LNM) and Low Consumption Mode (LCM)?
LNM forces continuous PWM operation across all load conditions, ensuring fixed switching frequency for predictable EMI behavior-ideal for RF-sensitive or noise-critical analog systems. LCM enters discontinuous conduction mode at light load, skipping pulses to reduce switching losses and achieve 30 μA IQ, making it optimal for battery-backed or always-on industrial nodes where efficiency at partial load dominates.
L6986 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4V
- Voltage - Input (Max):
- 38V
- Voltage - Output (Min/Fixed):
- 0.85V
- Voltage - Output (Max):
- 38V
- Current - Output:
- 2A
- Frequency - Switching:
- 250kHz ~ 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-HTSSOP
L6986 FAQ
1.How can I place an order for L6986 through Aetrix?
Please submit a Request for Quotation (RFQ) for L6986 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for L6986 reliable?
The price and inventory of L6986 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for L6986 is usually 5 days.
3.What payment methods are accepted for L6986?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for L6986 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for L6986?
L6986 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your L6986 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for L6986?
For technical support, including L6986 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your L6986 requirements.
6.How does Aetrix verify that L6986 is sourced from the original manufacturer or authorized distributors?
All L6986 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that L6986 meets industry standards.
7.What is the process for return or replacement of L6986?
All L6986 units undergo pre-shipment inspection (PSI). If there is an issue with L6986, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The L6986 part is unused and in its original packaging.
Return procedure for L6986:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
L6986 Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
