STMicroelectronics L9305EP-TR
- Part No.:
- L9305EP-TR
- Manufacturer:
- STMicroelectronics
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- -
- Datasheet:
-
L9305EP-TR.pdf
- Description:
- PTS ASSP
- Quantity:
- Payment:

- Shipping:

Inventory:2,466
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
L9305EP-TR from STMicroelectronics is a configurable 4-channel automotive solenoid driver IC qualified to AEC-Q100 Grade 0, supporting high-side or low-side configuration per channel, ±5 mA current accuracy (0–0.5 A), 375 mΩ max RDS(ON) @ 175 °C, and ISO 26262 ASIL-D compliance for transmission valve control.
For engineers reviewing the L9305EP-TR datasheet, L9305EP-TR pinout, L9305EP-TR application, or L9305EP-TR equivalent, this page delivers verified technical context, SPI register-level diagnostics, fail-safe pre-driver architecture, and validated alternatives for linear solenoid control in safety-critical automotive systems.
Technical Context
The L9305EP-TR implements four independent current-regulated drivers with dual-path redundancy: each channel integrates both power and recirculation transistors plus two independent current-sense paths-ensuring fault-tolerant measurement per solenoid. Its charge pump (VCP/VC1–VC4) enables high-side drive capability up to 2 A while maintaining VDS monitoring on external fail-safe FETs via FS_Dx/FS_Sx/FS_Gx pins.
SPI communication uses 32-bit frames with 5-bit CRC, frame counter, and long/short frame detection for secure configuration and real-time status reporting-including BIST-based self-test, temperature monitoring, EEPROM CRC-protected calibration memory, and programmable dither modulation over set-point current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Driver Channels | 4 independent, configurable as HS or LS per channel-enables mixed topology for multi-valve transmission modules. |
| Current Range & Accuracy | 0–1.5 A (±5 mA ≤0.5 A; ±1% >0.5 A); extended 0–2 A (±15 mA ≤0.3 A; ±5% 0.3–0.5 A; ±4% 0.5–2 A)-supports precise force control across solenoid stroke profiles. |
| RDS(ON) Max | 375 mΩ @ Tj = 175 °C-guarantees thermal robustness in under-hood environments without derating. |
| Current Set Resolution | 13-bit (0.25 mA step in normal range; 0.33 mA in extended range)-enables fine-grained PWM-independent current tuning. |
| SPI Interface | 32-bit frame with 5-bit CRC, address feedback, frame counter, and long/short frame detection-prevents command injection and ensures deterministic fault reporting. |
| Safety Certification | AEC-Q100 Grade 0 (−40 °C to +135 °C ambient), ISO 26262 ASIL-D ready-validated for automatic transmission, ESC, and active suspension ECU integration. |
| Fault Coverage | Redundant current sensing, VDS monitoring on fail-safe FETs, core overtemperature detection, EEPROM CRC, and SPI timeout latching-meets ASIL-D diagnostic coverage targets. |
Pinout & Package
Package: PowerSSO-36 (exposed pad down, 7.0 × 6.0 × 1.0 mm), thermally optimized for high-power solenoid drive with Rθj-a = 22 °C/W (2s2p board, natural convection).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VS_SOL0–VS_SOL3 | Channel Supply Input | Switched battery voltage input per channel (max 40 V), supports reverse-polarity protection diode connection. |
| LOAD_SOL0–LOAD_SOL3 | Power Output | High-current output node connecting to solenoid coil; supports HS/LS topology based on internal driver configuration. |
| GND_SOL0–GND_SOL3 | Channel Ground Return | Dedicated low-inductance ground path per channel-minimizes crosstalk and enables independent current sensing. |
| FS_D0–FS_D3, FS_S0–FS_S3, FS_G0–FS_G3 | Fail-Safe Pre-Driver Interface | Three-terminal interface to external N-FET for redundant hardware shutdown; FS_D/FS_S monitor VDS, FS_G controls gate. |
| EN_DR | Global Enable Input | Active-high hardware enable disabling all channels and fail-safe pre-drivers; echoes state in SPI status register. |
| RESn | Asynchronous Reset | Active-low reset forcing all registers to defaults, disabling outputs, and pulling FAULTn low-internally pulled down if floating. |
| FAULTn | Open-Drain Fault Output | Asserted low on unmasked faults (e.g., overtemperature, open load, VDD UV/OV, SPI timeout); requires external pull-up to VDDIO. |
| MOSI/SCLK/MISO/CS | SPI Interface | 3.3 V/5 V tolerant digital interface with CRC-protected 32-bit frames-supports daisy-chaining and error-resilient diagnostics. |
Key Features
| Feature | Design Value |
|---|---|
| Redundant Current Sensing | Two independent sense paths per channel-guarantees fault detection even if one path fails, satisfying ASIL-D diagnostic requirements. |
| Programmable Dither Modulation | Configurable frequency/amplitude dither superimposed on set-point current-reduces solenoid hysteresis and improves linearity in closed-loop position control. |
| Variable Slew Rate Control | Selectable rise/fall time for LOAD_SOL outputs-minimizes EMI during switching while preventing mechanical shock in fast-acting valves. |
| Secure SPI Communication | Address feedback, 5-bit CRC, frame counter, and long/short frame detection-prevents replay attacks and ensures command integrity in safety-critical networks. |
| Calibration Memory with CRC | On-chip EEPROM stores trimmed ADC/CSA parameters with CRC checksum-eliminates external calibration storage and ensures startup accuracy. |
Applications
| Automatic Transmission Valve Control | Electronic Stability Control (ESC) Modulators |
|---|---|
|
Use Scenario: Precise current regulation of linear solenoids controlling clutch pressure and gear shift timing in 8-speed automatic transmissions. IC Role / Device Role / Timing Role: Primary solenoid driver with closed-loop current control, dither modulation, and real-time fault reporting via SPI to transmission ECU. Use Value: Enables <1% current error across temperature, reducing shift jerk and extending solenoid life while meeting ASIL-D functional safety goals. |
Use Scenario: Driving hydraulic modulator solenoids in ESC systems to apply individual wheel braking during stability interventions. IC Role / Device Role / Timing Role: High-reliability valve actuator with redundant current sensing and fail-safe pre-driver-ensures safe torque reduction during critical events. Use Value: Dual-path current monitoring and VDS-monitored external FET shutdown guarantee fail-operational behavior per ISO 26262 Annex D. |
| Active Suspension Damping Valves | Engine Variable Valve Timing (VVT) Actuators |
|
Use Scenario: Controlling semi-active shock absorber damping force by regulating current through proportional solenoid valves in real time. IC Role / Device Role / Timing Role: Fast-response solenoid driver with programmable slew rate and 13-bit resolution-supports adaptive damping algorithms at 100 Hz+ update rates. Use Value: Sub-millisecond response and ±4% accuracy up to 2 A allow dynamic ride height and roll control without mechanical backlash. |
Use Scenario: Actuating oil-control valves (OCVs) in cam phasing systems to adjust intake/exhaust valve timing based on engine load and RPM. IC Role / Device Role / Timing Role: Robust solenoid interface with battery-supplied charge pump and thermal monitoring-operates reliably across wide ambient ranges (−40 °C to +135 °C). Use Value: Integrated VBATP overvoltage diagnosis and junction temperature sensing prevent OCV failure during cold cranking or high-load conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 4-channel automotive solenoid driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI DRV3245Q1RHFQ1 | 4-channel, 2.5 A max, no integrated charge pump; requires external high-side gate driver; SPI with 8-bit CRC only. | Lacks redundant current sensing and ASIL-D certification; suitable for non-ASIL systems with lower current demand. | Choose when cost sensitivity outweighs ASIL-D compliance and external gate driver design is acceptable. |
| NXP MC33816APEKR2 | 6-channel, 1.2 A max, integrated charge pump, but only 10-bit current resolution and no dither function. | Supports more channels but offers coarser current control and no programmable dither-limits precision in high-linearity valve applications. | Prefer for multi-solenoid systems where channel count >4 matters more than sub-mA resolution or hysteresis reduction. |
Compared with DRV3245Q1RHFQ1 and MC33816APEKR2, the L9305EP-TR uniquely combines ASIL-D readiness, 13-bit current resolution, dither modulation, and dual-path current sensing-making it the only option certified for safety-critical transmission and ESC valve control where fault tolerance and microamp-level accuracy are mandatory.
Availability
L9305EP-TR is available at Aetrix Electronics and suitable for automatic transmission control units, electronic stability control modules, and active suspension ECUs requiring stable component supply, long-term automotive lifecycle support, and traceable AEC-Q100 sourcing.
Supply support for L9305EP-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing silicon solutions for automotive, industrial, and power applications with vertical integration from R&D to wafer fabrication.
The L9305 belongs to ST's automotive power driver product line, engineered specifically for ASIL-D compliant solenoid and valve actuation in transmission, chassis, and engine control systems-emphasizing functional safety, thermal resilience, and diagnostic completeness.
FAQ
What is the maximum continuous current per channel for L9305EP-TR?
The L9305EP-TR supports up to 2 A per channel in extended range mode with ±4% accuracy from 0.5 A to 2 A. Thermal derating applies above 135 °C ambient; full 2 A operation is guaranteed up to Tj = 175 °C with proper PCB heatsinking on the exposed PowerSSO-36 pad.
How does the fail-safe pre-driver interface work with external FETs?
The FS_Dx, FS_Sx, and FS_Gx pins form a three-terminal interface to an external N-channel MOSFET used as a hardware-level shutdown switch. FS_D and FS_S monitor VDS across the FET to detect short/open faults, while FS_G drives the gate-enabling redundant, autonomous cutoff independent of SPI or MCU failure.
Can L9305EP-TR operate in both hardware and software control modes?
Yes: in Hardware Mode, INx_DISx pins act as channel enable/disable signals for closed-loop current control; in Software Mode, they accept PWM inputs to directly drive the output transistors-allowing flexible integration with legacy MCU firmware or advanced model-predictive control algorithms.
Is the L9305EP-TR pin-compatible with the TQFP48 version (L9305QFP-TR)?
No-PowerSSO-36 (L9305EP-TR) and TQFP48 (L9305QFP-TR) have different pin counts, layouts, and signal allocations. The TQFP48 adds dedicated FS pins for all four channels (FS_D1–FS_D3, etc.) and NC pins, while PowerSSO-36 consolidates FS interfaces and omits some diagnostic pins. PCB redesign is required for migration.
L9305EP-TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- *
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- -
- Number of Outputs:
- -
- Frequency - Switching:
- -
- Voltage/Current - Output 1:
- -
- Voltage/Current - Output 2:
- -
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- -
- w/Supervisor:
- -
- w/Sequencer:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
L9305EP-TR FAQ
1.How can I place an order for L9305EP-TR through Aetrix?
Please submit a Request for Quotation (RFQ) for L9305EP-TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for L9305EP-TR reliable?
The price and inventory of L9305EP-TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for L9305EP-TR is usually 5 days.
3.What payment methods are accepted for L9305EP-TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for L9305EP-TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for L9305EP-TR?
L9305EP-TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your L9305EP-TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for L9305EP-TR?
For technical support, including L9305EP-TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your L9305EP-TR requirements.
6.How does Aetrix verify that L9305EP-TR is sourced from the original manufacturer or authorized distributors?
All L9305EP-TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that L9305EP-TR meets industry standards.
7.What is the process for return or replacement of L9305EP-TR?
All L9305EP-TR units undergo pre-shipment inspection (PSI). If there is an issue with L9305EP-TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The L9305EP-TR part is unused and in its original packaging.
Return procedure for L9305EP-TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
L9305EP-TR Tags

-
TPS6521905RHBR
Texas Instruments

-
MIC3385YHL-TR
Microchip Technology

-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments

-
A4402KLPTR-T
Allegro MicroSystems

-
BD71847AMWV-E2
ROHM Semiconductor

-
ADP5040ACPZ-1-R7
Analog Devices Inc.

-
LT3048IDC#TRPBF
Analog Devices Inc.

-
ADP5037ACPZ-R7
Analog Devices Inc.

-
XRP7714ILB-F
MaxLinear, Inc.

-
LTC3260EDE#TRPBF
Analog Devices Inc.

-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
