STMicroelectronics LD1117AV
- Part No.:
- LD1117AV
- Manufacturer:
- STMicroelectronics
- Package:
- TO-220-3
- Datasheet:
-
LD1117AV.pdf
- Description:
- IC REG LINEAR POS ADJ 1A TO220
- Quantity:
- Payment:

- Shipping:

Inventory:4,814
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Product details
Overview
LD1117AV from STMicroelectronics is a low-dropout linear voltage regulator in adjustable configuration (VREF = 1.25 V), delivering up to 1 A output current with 1.15 V typical dropout at full load and ±2% output voltage tolerance at 25 °C. It operates across 0–125 °C junction temperature, supports 10 µF minimum output capacitance for stability, and features internal current/thermal limiting - commonly used in post-regulation of DC-DC converter outputs in industrial power supplies.
For engineers reviewing the LD1117AV datasheet, LD1117AV pinout, LD1117AV application, or LD1117AV equivalent, key selection criteria include dropout voltage at 1 A, quiescent current under no-load conditions, thermal resistance in SOT-223/DPAK/TO-220 packages, supply voltage rejection at 120 Hz, and minimum load current requirement for regulation stability.
Technical Context
The LD1117AV uses an NPN pass transistor architecture enabling low dropout while maintaining high PSRR (80 dB typ. at 120 Hz) and low output noise (100 µV RMS, 10 Hz–10 kHz). Its reference voltage is thermally stabilized at 1.25 V ±0.025 V, with adjustment pin current tightly specified at 60–120 µA and minimal drift (ΔIADJ ≤ 5 µA).
Regulation relies on external resistor divider between OUT–ADJ–GND, where output voltage follows VOUT = VREF(1 + R2/R1) + R2·IADJ; for typical R2 values (few kΩ), the IADJ term contributes <10 mV error. Kelvin routing of R1 near OUT/ADJ pins is required for optimal load regulation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 1000 mA max - supports single-rail microcontroller or FPGA core supply with margin. |
| Dropout Voltage | 1.15 V typ. @ 1 A - enables regulation from 4.45 V input to 3.3 V output, critical for battery-powered systems. |
| Reference Voltage | 1.25 V ±0.025 V - sets precision baseline for externally adjustable output; stable over temperature and line/load. |
| Quiescent Current | 5 mA typ. @ 25 °C - minimizes standby power loss in always-on subsystems. |
| Supply Voltage Rejection | 80 dB typ. @ 120 Hz - suppresses ripple from upstream switching converters without additional filtering. |
| Thermal Resistance (DPAK) | 8 °C/W junction-to-case - allows >1 W continuous dissipation with moderate heatsinking in compact layouts. |
| Stability Capacitance | 10 µF min. ceramic or electrolytic - eliminates need for specialized low-ESR capacitors, reducing BOM cost. |
Pinout & Package
LD1117AV is available in SOT-223, DPAK (TO-252), and TO-220 packages. The exposed thermal pad (TAB) is electrically connected to VOUT in all variants, requiring proper PCB copper pour for thermal management.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Input Supply Terminal | Accepts 2.75–15 V DC; must be decoupled with ≥10 µF capacitor close to pin. |
| VOUT | Regulated Output / Thermal Pad Connection | Delivers adjustable output; TAB connection mandates PCB thermal plane for safe 1 A operation. |
| ADJ | Reference Feedback Node | Connects to resistor divider; 60–120 µA bias current flows here - impacts R2 selection accuracy. |
Key Features
| Feature | Design Value |
|---|---|
| Low Dropout Architecture | NPN pass transistor enables 1.15 V dropout at 1 A - extends usable input range in multi-rail systems. |
| Internal Protection | Integrated current limit and thermal shutdown prevent damage during overload or poor heatsinking. |
| Tight Reference Tolerance | ±2% VREF at 25 °C ensures output accuracy within ±3% for common R1/R2 ratios without trimming. |
| High PSRR at Low Frequency | 80 dB rejection at 120 Hz enables clean LDO output directly after AC/DC or buck converter stages. |
| Minimal External Components | Only two resistors (R1=120 Ω fixed, R2 variable) and one 10 µF capacitor needed - reduces layout complexity and cost. |
Applications
| Industrial PLC I/O Module | Embedded Microcontroller Power |
|---|---|
|
Use Scenario: Regulating 5 V rail to 3.3 V for digital I/O buffers and isolated communication interfaces. IC Role / Device Role / Timing Role: Post-regulator providing low-noise, ripple-free supply independent of upstream switching noise. Use Value: 100 µV output noise and 80 dB PSRR eliminate need for ferrite beads or LC filters, saving board space and cost. |
Use Scenario: Generating stable 1.8 V core voltage for ARM Cortex-M4 MCU with dynamic load current up to 800 mA. IC Role / Device Role / Timing Role: Primary linear regulator ensuring voltage stability during CPU burst activity and sleep transitions. Use Value: 1.15 V dropout allows operation from 3.3 V input even as battery voltage declines, extending runtime. |
| FPGA Configuration Supply | Automotive Infotainment Core Rail |
|
Use Scenario: Providing precise 1.2 V for FPGA configuration banks requiring tight voltage tolerance and low transient deviation. IC Role / Device Role / Timing Role: Precision reference-based regulator maintaining VCCINT within ±3% across temperature and load. Use Value: ±2% VREF and 0.5% temperature stability ensure reliable bitstream loading and SRAM retention. |
Use Scenario: Generating 5 V auxiliary rail for USB host controllers and display drivers in 12 V automotive systems. IC Role / Device Role / Timing Role: High-PSRR LDO rejecting alternator ripple and load-dump transients before sensitive analog circuitry. Use Value: 80 dB PSRR at 120 Hz attenuates 1 VPP ripple to 10 mVPP, preventing USB enumeration failures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar adjustable LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM1117DTX-ADJ/NOPB | Higher dropout (1.2 V min. @ 1 A), wider VREF tolerance (±1.5%), 10 mA quiescent current. | Lacks thermal shutdown flag; lower PSRR (70 dB) limits use in high-ripple environments. | Prefer when legacy footprint compatibility is required and thermal margin exceeds 10 °C/W. |
| TLV1117-ADJ | Lower quiescent current (4 mA typ.), tighter VREF (1.25 V ±0.5%), but limited to 800 mA output. | Optimized for portable devices; not rated for 125 °C operation - unsuitable for under-hood automotive. | Choose for battery-powered designs needing ultra-low IQ and operating below 105 °C ambient. |
Compared with LM1117DTX-ADJ/NOPB, LD1117AV offers superior PSRR and thermal protection; versus TLV1117-ADJ, it delivers higher current and extended temperature range at the cost of slightly higher quiescent current.
Availability
LD1117AV is available at Aetrix Electronics and suitable for industrial PLCs, embedded microcontroller systems, FPGA configuration supplies, and automotive infotainment modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LD1117AV includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing silicon solutions for automotive, industrial, and consumer markets since 1987.
The LD1117A series was developed to provide robust, cost-effective LDO regulation for post-conversion applications in space-constrained industrial and embedded systems - emphasizing thermal resilience, minimal external components, and wide-input compatibility.
FAQ
What is the minimum load current required for stable regulation with LD1117AV?
The LD1117AV requires a minimum load current of 2–5 mA to maintain regulation, as specified in Table 7 of the datasheet. This ensures the ADJ pin bias current (60–120 µA) and internal bandgap circuit operate within design parameters. Below this threshold, output voltage may rise unpredictably due to insufficient current through the feedback divider.
Can LD1117AV be used in parallel to increase output current?
No - LD1117AV is not designed for parallel operation. Its output voltage tolerance (±2% on VREF) and lack of current-sharing control cause unequal current distribution, risking thermal runaway in one device. For >1 A requirements, select a higher-current LDO or redesign with a switching pre-regulator.
How does the thermal pad connection affect PCB layout for LD1117AV in DPAK package?
The DPAK's exposed thermal pad is internally connected to VOUT, so the PCB copper pour must be tied to the output net - not ground. A minimum 25 mm² thermal pad with ≥4 thermal vias (0.3 mm diameter) to inner-layer ground planes is recommended to achieve the 8 °C/W RthJC rating and sustain 1 A continuous output.
Is LD1117AV qualified for automotive applications per AEC-Q100?
No - LD1117AV is not AEC-Q100 qualified. While it operates from 0–125 °C junction temperature, STMicroelectronics does not certify this variant for automotive use. For automotive-grade equivalents, consider the LD1117ABV series (AEC-Q100 Grade 2, –40 to +105 °C ambient).
LD1117AV Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- TO-220-3
- Packaging:
- Tube
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Adjustable
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 15V
- Voltage - Output (Min/Fixed):
- 1.25V
- Voltage - Output (Max):
- 15V
- Voltage Dropout (Max):
- 1.3V @ 1A
- Current - Output:
- 1A
- Current - Quiescent (Iq):
- 5 mA
- Current - Supply (Max):
- -
- PSRR:
- 80dB (120Hz)
- Control Features:
- -
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- 0°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- TO-220
LD1117AV FAQ
1.How can I place an order for LD1117AV through Aetrix?
Please submit a Request for Quotation (RFQ) for LD1117AV on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD1117AV reliable?
The price and inventory of LD1117AV are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD1117AV is usually 5 days.
3.What payment methods are accepted for LD1117AV?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LD1117AV transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LD1117AV?
LD1117AV orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LD1117AV order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LD1117AV?
For technical support, including LD1117AV datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD1117AV requirements.
6.How does Aetrix verify that LD1117AV is sourced from the original manufacturer or authorized distributors?
All LD1117AV products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD1117AV meets industry standards.
7.What is the process for return or replacement of LD1117AV?
All LD1117AV units undergo pre-shipment inspection (PSI). If there is an issue with LD1117AV, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD1117AV part is unused and in its original packaging.
Return procedure for LD1117AV:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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