STMicroelectronics LD2982AM40R

Overview

LD2982AM40R from STMicroelectronics is a 50 mA fixed-output low-dropout (LDO) voltage regulator with 1.8 V output, TTL-compatible inhibit control, and ultra-low noise (30 µV_RMS). It delivers 120 mV dropout at 50 mA, 7 µA quiescent current in shutdown, and stable operation with only 1 µF ceramic output capacitance - ideal for battery-powered portable electronics requiring clean, efficient local regulation.

For engineers reviewing the LD2982AM40R datasheet, LD2982AM40R pinout, LD2982AM40R application, or LD2982AM40R equivalent, key selection criteria include its 1.8 V ±1% output tolerance at 25 °C, SOT23-5L package footprint, 30 µV_RMS noise performance with 10 nF bypass capacitor, and logic-controlled shutdown enabling system-level power gating in space-constrained designs.

Technical Context

The LD2982AM40R integrates a PNP pass transistor architecture enabling ultra-low dropout (as low as 7 mV at 1 mA) and minimal quiescent current across load range. Its internal feedback network sets a precise 1.8 V output, with thermal and current limiting ensuring robustness under fault conditions.

Inhibit functionality is implemented via Pin 3 (INHIBIT), which disables regulation when pulled below 0.18 V - drawing <1 µA total supply current in sleep mode. The dedicated Bypass pin (Pin 4) accepts a 10 nF capacitor to ground, reducing output noise to 30 µV_RMS over 300 Hz–50 kHz bandwidth without requiring external compensation.

Key Specifications

Pinout & Package

SOT23-5L package: 2.8 mm × 1.75 mm × 1.3 mm body, 0.95 mm pitch, thermally enhanced die pad (exposed copper not electrically connected).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with AP2112K-1.8TRG1 and MCP1700T-1802E/TT, the LD2982AM40R uniquely combines 1.8 V ±1% accuracy, 30 µV_RMS noise with bypass pin, and sub-1 µA shutdown - making it optimal for space-constrained, battery-operated systems demanding precision low-noise regulation and dynamic power control.

Availability

LD2982AM40R is available at Aetrix Electronics and suitable for cellular handset power management, portable medical sensor nodes, PDA application processor core supplies, and digital camera image sensor bias circuits requiring stable component supply and long-lifecycle support.

Supply support for LD2982AM40R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing silicon solutions for automotive, industrial, and consumer markets since 1987.

The LD2982 series belongs to ST's precision low-noise LDO portfolio, engineered specifically for battery-powered portable electronics where ultra-low dropout, micropower shutdown, and clean output rails are critical to system performance and runtime.

FAQ

What is the minimum input voltage required for regulation at 1.8 V output?

The LD2982AM40R maintains regulation down to an input voltage of 1.92 V at 50 mA load (1.8 V + 120 mV dropout). At lighter loads, dropout falls to 7 mV - allowing stable 1.8 V output from as low as 1.807 V input at 1 mA. Input must remain ≥2.5 V for guaranteed specification compliance per datasheet test conditions.

Can the INHIBIT pin be left unconnected?

No. The INHIBIT pin has no internal pull-up or pull-down and must never be left floating. To ensure normal operation, tie Pin 3 directly to the input voltage (VI) if shutdown control is unused. Leaving it open risks unpredictable enable/disable behavior and potential output instability due to noise coupling.

Is a bypass capacitor mandatory on the Bypass pin?

A 10 nF capacitor between Pin 4 (BYPASS) and GND is required to achieve the specified 30 µV_RMS output noise. Without it, noise rises to typical values above 100 µV_RMS. The capacitor must be high-quality ceramic (X7R/C0G), placed within 2 mm of the pin, and connected to a clean analog ground plane to maintain noise performance.

What output capacitor value is required for stability with 1.8 V output?

For 1.8 V output, ST specifies a minimum 2.2 µF low-ESR ceramic capacitor (X7R or better) on the OUT pin. This value ensures phase margin >45° across temperature and load. Using less than 2.2 µF risks oscillation unless a series resistor (typically 1–5 Ω) is added to emulate ESR - but this degrades transient response and is not recommended for production designs.