STMicroelectronics LD2982BM31R

Overview

LD2982BM31R from STMicroelectronics is a 50 mA, 1.8 V fixed-output low-dropout linear regulator in SOT23-5L package, featuring 120 mV dropout at 50 mA, 30 µV_rms output noise (with 10 nF bypass capacitor), and logic-controlled inhibit shutdown drawing <1 µA in sleep mode. It targets ultra-low-noise, battery-sensitive subsystems such as RF front-ends and precision analog sensors in portable electronics.

For engineers reviewing the LD2982BM31R datasheet, LD2982BM31R pinout, LD2982BM31R application, or LD2982BM31R equivalent, key selection criteria include its ±1% output tolerance at 25 °C, compatibility with 1 µF ceramic output capacitors, TTL-compatible INHIBIT pin behavior, and thermal performance up to 125 °C junction temperature.

Technical Context

The LD2982BM31R employs a PNP pass transistor architecture enabling ultra-low dropout (7 mV at 1 mA, 120 mV at 50 mA) and inherently low reverse current (<160 µA when V_OUT > V_IN). Its internal feedback network uses implanted resistors (R1 = 42.6 kΩ, R2 = 51.15 kΩ) for stable 1.8 V regulation across –40 °C to +125 °C.

Stability is achieved with minimal external components: only 1 µF input/output ceramic capacitors are required, and a 10 nF capacitor on the Bypass pin reduces integrated output noise to 30 µV_rms (300 Hz–50 kHz). The INHIBIT pin (Pin 3) accepts TTL-level control with V_IL ≤ 0.15 V and V_IH ≥ 2 V, enabling board-level power gating.

Key Specifications

Pinout & Package

LD2982BM31R is housed in a compact, surface-mount SOT23-5L package (2.8 × 1.6 × 1.3 mm, 5-pin), optimized for space-constrained PCB layouts and compatible with standard reflow profiles.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-noise, low-I_Q LDO applications.

Compared with MCP1703T-1802E/MB and XC6206P182MR-G, LD2982BM31R uniquely combines sub-100 mV dropout, <1 µA shutdown, and dedicated bypass noise filtering-making it optimal for battery-powered, noise-critical 1.8 V analog subsystems requiring dynamic power gating.

Availability

LD2982BM31R is available at Aetrix Electronics and suitable for wireless sensor nodes, portable audio systems, industrial edge controllers, and medical wearables requiring stable component supply across long product lifecycles.

Supply support for LD2982BM31R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, analog chips, and MEMS sensors for industrial, automotive, and consumer markets.

The LD2982 series belongs to ST's high-precision, ultra-low-noise LDO portfolio, engineered specifically for battery-powered portable devices and noise-sensitive analog signal chains where regulation accuracy, efficiency, and EMI resilience are critical.

FAQ

What is the minimum input voltage required for stable 1.8 V output at 50 mA?

The LD2982BM31R requires an input voltage ≥1.92 V to maintain regulation at 50 mA load, based on its 120 mV typical dropout voltage. At lighter loads (e.g., 1 mA), input can be as low as 1.807 V due to 7 mV dropout. Input must remain within absolute maximum rating (≤16 V) and above 2.5 V minimum operating voltage specified in datasheet Table 5.

Can the INHIBIT pin be left unconnected?

No-the INHIBIT pin (Pin 3) is not internally pulled up or down and must never be left floating. If shutdown functionality is unused, it must be tied directly to the IN pin to ensure continuous operation. Leaving it open risks undefined regulator state and potential output instability due to noise coupling.

Is a bypass capacitor mandatory on the BYPASS pin?

A 10 nF capacitor between BYPASS (Pin 4) and GND is required to achieve the specified 30 µV_rms output noise. Without it, output noise rises significantly-typical un-bypassed noise exceeds 100 µV_rms. The capacitor must be placed adjacent to the pin with short, low-inductance traces to GND for effective high-frequency noise suppression.

What output capacitor value is recommended for 1.8 V operation?

For 1.8 V output, ST specifies a minimum 2.2 µF ceramic capacitor (X7R or better) on the OUT pin. This value ensures stability across temperature and load; using smaller values risks oscillation unless a series resistor is added per Application Note 6.3. The capacitor must have low ESR and be placed ≤0.5" from the OUT pin and GND.