STMicroelectronics LD2982BM36R

Overview

LD2982BM36R from STMicroelectronics is a 50 mA fixed-output low-dropout linear voltage regulator with 1.8 V output, 120 mV dropout at 50 mA, 30 µV_RMS output noise, logic-controlled inhibit function (TTL-compatible), and SOT23-5L package. It delivers ultra-low quiescent current (75 µA at 1 mA load) and supports battery-powered portable electronics requiring stable, low-noise power for sensitive analog or RF circuitry.

For engineers reviewing the LD2982BM36R datasheet, LD2982BM36R pinout, LD2982BM36R application, or LD2982BM36R equivalent, this page provides verified technical context, real-world design meaning of key specs, validated pin functions, application-specific use cases, and confirmed alternative regulators with documented functional differences.

Technical Context

The LD2982BM36R integrates a PNP pass transistor enabling ultra-low dropout (7 mV at 1 mA, 120 mV at 50 mA) and operates with input voltages as low as 2.5 V. Its internal feedback network sets a precise 1.8 V output with ±1% tolerance at 25 °C and maintains regulation across –40 °C to +125 °C junction temperature.

It features a dedicated INHIBIT pin (Pin 3) that disables the regulator and reduces quiescent current to <1 µA when pulled below 0.18 V, and a Bypass pin (Pin 4) accepting a 10 nF capacitor to reduce output noise to 30 µV_RMS (300 Hz–50 kHz). Stability is ensured with only 1 µF ceramic output capacitance for ≥3.8 V versions - but requires 2.2 µF for 1.8 V output.

Key Specifications

Pinout & Package

LD2982BM36R is housed in a compact, surface-mount SOT23-5L package (2.8 × 1.75 × 1.3 mm), optimized for space-constrained portable designs and compatible with standard reflow processes.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-noise, low-I_Q LDO applications.

Compared with XC6206P182MR and ADP160ACBZ-1.8-R7, LD2982BM36R uniquely balances ultra-low dropout (120 mV), integrated INHIBIT control, and adjustable noise performance via Bypass pin - making it optimal for portable systems demanding both battery efficiency and signal integrity.

Availability

LD2982BM36R is available at Aetrix Electronics and suitable for smartphone baseband power, wearable sensor node supply, industrial PLC I/O modules, and automotive infotainment MCU core applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for LD2982BM36R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing silicon solutions for automotive, industrial, and consumer markets since 1987.

The LD2982 belongs to ST's high-performance LDO portfolio targeting portable and battery-critical applications, emphasizing ultra-low dropout, sub-µA shutdown, and low-noise operation for next-generation mobile and IoT devices.

FAQ

What is the minimum input voltage required for LD2982BM36R to maintain 1.8 V output at 50 mA?

The minimum input voltage is calculated as V_OUT + V_DROP = 1.8 V + 0.12 V = 1.92 V. However, the absolute minimum specified operating input voltage is 2.5 V per datasheet Table 4 - this accounts for line regulation, temperature drift, and margin for reliable startup and transient response under all conditions.

Can LD2982BM36R operate without the 10 nF bypass capacitor on Pin 4?

Yes - the device functions without the bypass capacitor, but output noise increases from 30 µV_RMS to approximately 120 µV_RMS. The 10 nF capacitor is optional for noise-sensitive applications like ADC references or RF synthesizers; omitting it reduces BOM count and board area where noise is non-critical.

Is the INHIBIT pin 5 V tolerant when the input supply is 16 V?

No - the absolute maximum INHIBIT input voltage is 16 V (same as V_IN), but the logic thresholds are defined for TTL compatibility: V_IL ≤ 0.18 V and V_IH ≥ 2 V. Driving INHIBIT with 5 V is acceptable only if the source can sink current and remains within the 16 V absolute max; however, direct connection to 5 V logic is safe and commonly used.

Why does the 1.8 V version require a larger output capacitor (2.2 µF) than higher-output variants (1 µF)?

Loop stability depends on output impedance and gain-phase margin, which vary with output voltage due to internal feedback resistor ratios. At 1.8 V, the feedback network's effective resistance increases, reducing phase margin - thus requiring 2.2 µF (vs. 1 µF for ≥3.8 V) to ensure sufficient capacitance and ESR damping for unconditional stability across temperature and load.