STMicroelectronics LD2985BM31R

Overview

LD2985BM31R from STMicroelectronics is a 150 mA fixed-output low-dropout linear voltage regulator delivering 3.1 V with 280 mV dropout at 150 mA load, 30 µV_rms output noise (with 10 nF bypass capacitor), and logic-controlled inhibit shutdown reducing quiescent current to <1 µA. It serves as a local power rail regulator in portable battery-powered systems requiring ultra-low noise and standby efficiency.

For engineers reviewing the LD2985BM31R datasheet, LD2985BM31R pinout, LD2985BM31R application, or LD2985BM31R equivalent, key selection criteria include its 3.1 V fixed output, SOT23-5L package footprint, TTL-compatible INHIBIT control on Pin 3, thermal performance up to 125 °C junction, and compatibility with ceramic output capacitors down to 2.2 µF for stable operation.

Technical Context

The LD2985BM31R employs a PNP pass transistor architecture enabling ultra-low dropout voltage-just 7 mV at 1 mA and 280 mV at full 150 mA load-while maintaining tight output regulation across -40 °C to +125 °C. Its internal feedback network sets a precise 3.1 V nominal output with ±1.2% tolerance over temperature and load.

Shutdown is implemented via a dedicated TTL-compatible INHIBIT pin (Pin 3) that disables the pass element when pulled below 0.15 V, cutting total supply current to under 1 µA. A separate Bypass pin (Pin 4) accepts a 10 nF capacitor to ground, reducing integrated output noise to 30 µV_rms (300 Hz–50 kHz).

Key Specifications

Pinout & Package

SOT23-5L surface-mount package (1.45 mm height, 2.95 mm × 1.60 mm footprint) with exposed pad not electrically connected; RoHS-compliant, ECOPACK2 certified.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar fixed-output LDO regulator applications.

Compared with TPS7A0531PDBVR and MCP1700T-3102E/TT, the LD2985BM31R uniquely combines sub-µA inhibit shutdown, 30 µV_rms noise via bypass pin, and guaranteed 150 mA delivery in SOT23-5L-making it optimal for space-constrained, battery-critical, noise-sensitive applications.

Availability

LD2985BM31R is available at Aetrix Electronics and suitable for portable medical sensors, wearable health monitors, industrial handheld terminals, and smart camera modules requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.

Supply support for LD2985BM31R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, analog chips, and MEMS sensors for industrial, automotive, and consumer markets.

The LD2985 series belongs to ST's high-performance LDO portfolio targeting ultra-low-noise, low-power, and battery-operated applications-designed specifically for portable electronics where dropout, quiescent current, and noise define system-level performance.

FAQ

What is the minimum input voltage required for stable 3.1 V output at 150 mA?

The LD2985BM31R requires an input voltage ≥3.38 V to maintain regulation at 150 mA load, based on its maximum dropout voltage of 280 mV (3.1 V + 0.28 V). Below this, output voltage collapses linearly with input. Input must also stay within absolute max rating of 16 V and minimum operating voltage of 2.5 V.

Can the INHIBIT pin be left unconnected?

No-the INHIBIT pin (Pin 3) has no internal pull-up or pull-down and must never be left floating. If shutdown control is unused, tie it directly to the IN pin to ensure continuous operation. Floating INHIBIT may cause erratic enable/disable behavior due to noise coupling.

Is a bypass capacitor mandatory for achieving 30 µV_rms noise?

Yes-30 µV_rms output noise is only achieved when a 10 nF ceramic capacitor is connected between the BYPASS pin (Pin 4) and GND. Without it, typical output noise rises to approximately 120 µV_rms. The capacitor must be placed adjacent to the pin with short, low-inductance traces.

What output capacitor value is required for stability with 3.1 V output?

For 3.1 V output, ST specifies a minimum 2.2 µF X7R ceramic capacitor on the OUT pin (Pin 5), placed within 12.7 mm of the pin and returned to clean analog ground. Lower ESR improves phase margin; tantalum capacitors are acceptable but less optimal due to size and aging effects.