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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Voltage Regulators - Linear, Low Drop Out (LDO) Regulators

STMicroelectronics LD39050PVR

Name: LD39050PVR
Brand: STMicroelectronics
SKU: LD39050PVR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: LD39050PVR

Manufacturer:: STMicroelectronics

Category:: Voltage Regulators - Linear, Low Drop Out (LDO) Regulators

Package:: 6-UFDFN Exposed Pad

Datasheet:: LD39050PVR.pdf

Description:: IC REG LINEAR POS ADJ 500MA 6DFN

Quantity:: RFQ Add To RFQ list

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Product details

Overview

LD39050PVR from STMicroelectronics is a 500 mA ultra-low-dropout linear voltage regulator with 200 mV typical dropout at full load, 20 µA typical quiescent current at no load, ±2.0% output voltage tolerance at 25 °C, and operation across 1.5 V to 5.5 V input range. It features logic-controlled shutdown (EN), Power Good (PG) open-drain output, and stable operation with 1 µF ceramic output capacitor - designed for space-constrained, battery-powered systems requiring low noise and high efficiency.

For engineers reviewing the LD39050PVR datasheet, LD39050PVR pinout, LD39050PVR application, or LD39050PVR equivalent, key selection criteria include dropout voltage under 500 mA load, sub-1 µA shutdown current, PG threshold accuracy (0.92×VOUT rising edge), thermal shutdown at 160 °C, and compatibility with DFN6 (2x2 mm) footprint in production-grade automotive and industrial designs.

Technical Context

The LD39050PVR implements an internal bandgap reference, error amplifier, and PMOS pass transistor to achieve ultra-low dropout and minimal quiescent current across temperature. Its enable-controlled shutdown reduces total supply current to ≤1 µA, while the open-drain PG pin asserts when VOUT reaches 92% of nominal and deasserts at 80%, supporting system power sequencing.

Stability is ensured with 1–22 µF ceramic capacitors on both input and output; ESR requirements are relaxed due to internal compensation. The device integrates short-circuit constant-current limiting (600–800 mA) and thermal shutdown with 20 °C hysteresis, enabling robust operation in thermally demanding environments from –40 °C to +125 °C junction temperature.

Key Specifications

Parameter	Value and Actual Design Meaning
Output current	500 mA guaranteed continuous output - supports microcontroller cores, RF transceivers, and sensor subsystems without external boost.
Dropout voltage	200 mV typ. at 500 mA - enables regulation from 1.5 V input down to 0.8 V output, critical for single-cell Li-ion and coin-cell applications.
Quiescent current	20 µA typ. at no load; 100 µA typ. at 500 mA - minimizes standby power loss in always-on IoT endpoints and wearables.
Noise performance	30 µV_RMS (10 Hz–100 kHz) - eliminates need for bypass capacitor, reducing BOM count and PCB area in noise-sensitive analog/RF rails.
Power supply rejection	65 dB at 1 kHz - suppresses ripple from noisy switching supplies feeding intermediate LDO stages in multi-rail power architectures.
Operating temperature	–40 °C to +125 °C junction - qualified for under-hood automotive modules and industrial motor control enclosures.
Enable logic levels	V_IL ≤ 0.4 V, V_IH ≥ 0.9 V - compatible with 1.8 V and 3.3 V GPIO without level-shifting in modern SoC-based designs.

Pinout & Package

LD39050PVR uses the DFN6 (2x2 mm) package with exposed thermal pad (must be connected to GND). Pin numbering follows top-view orientation per Figure 4 of STMicroelectronics DocID15470 Rev 5.

Pin/Terminal	Circuit Role	Design Meaning
1 - VIN	Input voltage supply	Accepts 1.5–5.5 V DC; requires 1 µF ceramic decoupling close to pin for stability and transient response.
2 - EN	Enable control input	Active-high logic: <0.4 V = shutdown (<1 µA I_Q), >0.9 V = active; 0.1–100 nA input leakage avoids unintended wake-up.
3 - PG	Power Good open-drain output	Asserts high-Z when VOUT ≥ 92% V_NOM; sinks 6 mA max; used for processor reset hold-off or rail sequencing in multi-LDO systems.
4 - VOUT	Regulated output	Delivers up to 500 mA with ±2.0% initial accuracy; stable with 1–22 µF ceramic C_OUT (ESR <1.5 Ω @100 kHz).
5 - ADJ	Adjustable feedback node	Connects to external resistor divider for programmable output (0.8–4.5 V); 800 mV reference voltage sets V_OUT = 0.8 × (1 + R1/R2).
6 - GND	Ground reference	Common return for VIN, VOUT, EN, PG, and ADJ; exposed pad must be soldered to PCB GND plane for thermal and electrical integrity.

Key Features

Feature	Design Value
Ultra-low-noise regulation	30 µV_RMS output noise without bypass capacitor - eliminates secondary filtering components in ADC reference or PLL supply rails.
Thermal & short-circuit protection	160 °C thermal shutdown with 20 °C hysteresis and 600–800 mA constant-current limit - prevents damage during overload or ambient overheating.
Ceramic capacitor compatibility	Stable with 1 µF C_OUT (minimum); supports compact, high-reliability designs where tantalum or electrolytic capacitors are prohibited.
Logic-controlled shutdown	EN pin draws ≤100 nA and achieves <1 µA total device current in OFF mode - extends battery life in sleep-state applications by orders of magnitude.
Power Good monitoring	PG pin provides precise 0.92×V_OUT rising-edge detection and 0.8×V_OUT falling-edge release - enables deterministic power sequencing in FPGA or MCU boot sequences.

Applications

Mobile Phone Baseband

Industrial Sensor Node

Use Scenario: Powering ARM Cortex-M4 core and integrated ADC in cellular IoT module operating from single Li-ion cell (3.0–4.2 V).

IC Role / Device Role / Timing Role: Primary LDO delivering clean 1.2 V rail with <30 µV_RMS noise and fast load transient recovery (40 mVpp step from 10 mA → 500 mA).

Use Value: Enables 12-bit ADC accuracy without external filtering; 20 µA quiescent current extends 10-year battery life in NB-IoT deployments.

Use Scenario: Supplying MEMS accelerometer, BLE radio, and EEPROM in sealed environmental monitor deployed in factory automation.

IC Role / Device Role / Timing Role: System LDO providing 3.3 V to digital peripherals with PG signal coordinating MCU wake-up after brown-out recovery.

Use Value: PG assertion ensures firmware executes only after stable 3.3 V is established; -40 °C to +125 °C rating guarantees reliability in uncontrolled ambient conditions.

Hard Disk Drive Controller

Automotive Infotainment SoC Core Rail

Use Scenario: Regulating 1.8 V for HDD controller ASIC from 5 V intermediate bus, co-located with high-speed data lines.

IC Role / Device Role / Timing Role: Low-noise, low-dropout LDO placed adjacent to ASIC die to minimize IR drop and EMI coupling.

Use Value: 65 dB PSRR at 1 kHz rejects switching noise from upstream DC/DC converter; DFN6 (2x2 mm) footprint saves board space near dense BGA packages.

Use Scenario: Delivering 1.1 V core voltage to automotive-grade application processor in head unit, operating from 12 V battery via buck pre-regulator.

IC Role / Device Role / Timing Role: Final-stage LDO with thermal shutdown and PG signaling to meet AEC-Q100 Grade 2 (105 °C ambient) requirements.

Use Value: 125 °C junction rating and 200 mV dropout allow operation during engine hot-soak; PG output validates rail before SoC initialization.

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Torex XC6210B122MR-G	400 mA output, 150 mV dropout at 300 mA, 1 µA shutdown current, no PG pin, SOT-25 package	Lacks Power Good output and thermal shutdown; limited to lower-current, non-safety-critical consumer devices	Select when PG signaling and thermal protection are unnecessary and PCB space permits SOT-25 mounting.
Analog Devices ADM7172ACPZ-R7	2 A output, 125 mV dropout at 2 A, 300 µA quiescent current, 10 µV_RMS noise, LFCSP-10 package	Higher current and lower noise but 15× higher I_Q; requires larger 4.7 µF C_OUT and more complex layout	Choose for high-performance analog rails where 500 mA is insufficient and 20 µA standby is not mandatory.

Compared with XC6210B122MR-G, LD39050PVR adds PG monitoring and thermal safety for mission-critical systems; versus ADM7172ACPZ-R7, it trades raw performance for ultra-low I_Q and smaller footprint - optimizing for battery longevity and space-constrained embedded designs.

Availability

LD39050PVR is available at Aetrix Electronics and suitable for mobile phone baseband power, industrial sensor nodes, hard disk drive controllers, and automotive infotainment SoC core rails requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for LD39050PVR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, microcontrollers, sensors, and automotive ICs with broad manufacturing scale and AEC-Q100 qualification capability.

The LD39050 belongs to ST's high-efficiency, low-noise LDO portfolio targeting battery-powered and thermally constrained applications - engineered for minimal dropout, ultra-low quiescent current, and seamless integration into compact, reliable power architectures.

FAQ

What is the minimum output capacitor required for stability with LD39050PVR?

The LD39050PVR is stable with a minimum 1 µF ceramic output capacitor (X5R/X7R, 0402 or larger). ST specifies 1–22 µF range with ESR <1.5 Ω at 100 kHz; using 1 µF meets all transient and noise requirements without derating, making it ideal for space-constrained layouts.

Does LD39050PVR support adjustable output voltage?

Yes - LD39050PVR is the adjustable version of the LD39050 family. Its ADJ pin connects to a resistor divider between VOUT and GND, setting output voltage from 0.8 V to 4.5 V in 100 mV steps using V_REF = 800 mV (±2% over temperature).

How does the Power Good (PG) pin behave during startup and fault conditions?

The PG pin is an open-drain output that remains low until VOUT reaches 92% of its nominal value, then pulls high-impedance. It falls low again when VOUT drops below 80% V_NOM. During thermal shutdown or short-circuit, PG deasserts immediately, enabling real-time fault detection in host systems.

Can LD39050PVR operate with input voltage below 1.5 V?

No - the absolute minimum input voltage is 1.5 V per datasheet specifications. Operation below this risks improper biasing of internal circuitry, loss of regulation, and undefined behavior. For sub-1.5 V inputs, consider ST's LD39200 series or alternative ultra-low-V_IN regulators.

LD39050PVR Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: -

Package/Case:: 6-UFDFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Output Configuration:: Positive

Output Type:: Adjustable

Number of Regulators:: 1

Voltage - Input (Max):: 5.5V

Voltage - Output (Min/Fixed):: 0.8V

Voltage - Output (Max):: 4.5V

Voltage Dropout (Max):: 0.2V @ 500mA

Current - Output:: 500mA

Current - Quiescent (Iq):: 50 µA

Current - Supply (Max):: 200 µA

PSRR:: 65dB ~ 62dB (1kHz ~ 10kHz)

Control Features:: Enable, Power Good

Protection Features:: Over Current, Over Temperature, Short Circuit

Operating Temperature:: -40°C ~ 125°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 6-DFN (2x2)

LD39050PVR FAQ

1.How can I place an order for LD39050PVR through Aetrix?

Please submit a Request for Quotation (RFQ) for LD39050PVR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LD39050PVR reliable?

The price and inventory of LD39050PVR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD39050PVR is usually 5 days.

3.What payment methods are accepted for LD39050PVR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LD39050PVR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LD39050PVR?

LD39050PVR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LD39050PVR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LD39050PVR?

For technical support, including LD39050PVR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD39050PVR requirements.

6.How does Aetrix verify that LD39050PVR is sourced from the original manufacturer or authorized distributors?

All LD39050PVR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD39050PVR meets industry standards.

7.What is the process for return or replacement of LD39050PVR?

All LD39050PVR units undergo pre-shipment inspection (PSI). If there is an issue with LD39050PVR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LD39050PVR part is unused and in its original packaging.

Return procedure for LD39050PVR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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