STMicroelectronics LD56020M110R

Overview

LD56020M110R from STMicroelectronics is a 1.1 V, 200 mA ultra-low-noise low-dropout (LDO) voltage regulator in SOT23-5L package, featuring 190 mV max dropout at full load, ±2% output accuracy over temperature, 8.8 µVRMS noise (10 Hz–100 kHz), and logic-controlled shutdown with <0.1 µA standby current. It powers noise-sensitive analog rails in compact battery-powered systems such as image sensor bias supplies.

For engineers reviewing the LD56020M110R datasheet, LD56020M110R pinout, LD56020M110R application, or LD56020M110R equivalent, key selection criteria include dropout voltage at 200 mA, output noise performance under light-to-full load, thermal shutdown threshold (160 °C), active discharge behavior, and compatibility with 0.7–1 µF ceramic input/output capacitors.

Technical Context

The LD56020M110R implements a PMOS pass transistor architecture enabling ultra-low dropout and near-zero quiescent current dependency on load. Its internal bandgap reference and error amplifier deliver ±2% output regulation across –40 °C to +125 °C junction temperature, with line regulation of 0.01–0.1 %/V and load regulation of ≤5 mV (CSP) or ≤20 mV (SOT23-5L) from 1 mA to 200 mA.

It integrates enable-controlled startup with 150 µs turn-on time, thermal foldback limiting, short-circuit current foldback (100 mA typ.), and output active discharge via internal NMOS switch. The device is stable with 0.7–1 µF ceramic capacitors and supports 50 mV output voltage steps from 0.6 V to 4.0 V (custom options).

Key Specifications

Pinout & Package

SOT23-5L package (2.92 mm × 2.80 mm × 1.10 mm height), RoHS-compliant, ECOPACK2 qualified. Exposed pad must be connected to GND for thermal and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with XC6210B112MR-G and RT9080AL-11PU5, LD56020M110R uniquely combines sub-200 mV dropout, <9 µVRMS noise, integrated active discharge, and guaranteed 0.1 µA shutdown - making it optimal for space- and noise-constrained battery-powered analog subsystems.

Availability

LD56020M110R is available at Aetrix Electronics and suitable for smartphone image sensor biasing, RF VCO powering, wearable PPG signal chains, and industrial edge node MCU cores requiring stable component supply with tight parametric consistency and long-term manufacturability.

Supply support for LD56020M110R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing silicon solutions for automotive, industrial, power, and consumer markets since 1987.

The LD56020 belongs to ST's high-accuracy, ultra-low-noise LDO family targeting battery-powered portable electronics - engineered specifically for noise-sensitive analog and RF subsystems where traditional regulators introduce unacceptable spectral contamination.

FAQ

What is the minimum input voltage required for stable 1.1 V output at 200 mA?

The LD56020M110R requires VIN ≥ VOUT + VDROP = 1.1 V + 0.19 V = 1.29 V for full 200 mA output. At lower inputs, current capability scales down per the dropout vs. load curve (Figure 10); operation is guaranteed down to 1.1 V input with reduced output current.

Can the NC pin (Pin 4) be left floating in the SOT23-5L package?

Yes - Pin 4 is explicitly designated "Not internally connected" in the datasheet. It may be left unconnected or tied to GND for mechanical reinforcement, but it has no electrical function and introduces no risk if floating.

Does the LD56020M110R require an external resistor on the EN pin to ensure reliable startup?

No - EN has an internal 1 MΩ pull-down resistor. Driving EN ≥0.7 V (e.g., from a 1.8 V GPIO) directly enables the device; no external components are needed for basic enable control or power sequencing.

How does the active discharge function behave during shutdown?

When EN is pulled low, an internal NMOS switch connects VOUT to GND, discharging the output capacitor. Typical discharge time is <1 ms for a 1 µF COUT, ensuring rapid, deterministic rail collapse for controlled power sequencing in multi-voltage systems.