STMicroelectronics LD59150PUR

Overview

LD59150PUR from STMicroelectronics is a 1.5 A AEC-Q100 qualified low-dropout linear regulator with dual supply inputs (VIN: 0.8–5.5 V, VBIAS: 2.7–5.5 V), adjustable output (0.8–3.6 V), ultra-low dropout (65 mV typ. at 1.5 A), and integrated Power Good and programmable soft-start functions-designed for post-regulation in automotive ADAS and industrial FPGA/ASIC power rails.

For engineers reviewing the LD59150PUR datasheet, LD59150PUR pinout, LD59150PUR application, or LD59150PUR equivalent, key selection criteria include VIN/VBIAS dual-rail operation, ±0.5% output accuracy over temperature, thermal shutdown at 165 °C, wettable-flank DFN10 package compatibility with automated optical inspection, and PG/EN sequencing capability for multi-rail systems.

Technical Context

The LD59150PUR uses an NMOS pass transistor architecture to achieve ultra-low dropout voltage even at low input voltages, enabling stable regulation down to VIN = VOUT + 65 mV. Its dual-bias architecture separates input power path (VIN) from control rail (VBIAS), allowing independent optimization of efficiency and stability.

It integrates a precision 0.8 V bandgap reference, programmable soft-start via external CSS capacitor (t_SS = (0.8 V × C_SS) / 0.44 µA), and open-drain Power Good with 90% V_OUT threshold and 3% hysteresis-enabling reliable power sequencing and fault monitoring in safety-critical automotive domains.

Key Specifications

Pinout & Package

LD59150PUR is housed in a 3 mm × 3 mm DFN10 package with wettable flanks for solder joint inspection. The exposed pad must be connected to GND for thermal and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with TPS7A8300RGRT and TLS850F0TES, LD59150PUR uniquely combines AEC-Q100 qualification, 1.5 A output, dual-bias operation, and adjustable VOUT in a wettable-flank DFN-making it the only option meeting full functional, thermal, and automotive process requirements for high-current post-regulation.

Availability

LD59150PUR is available at Aetrix Electronics and suitable for automotive ADAS camera modules, industrial FPGA power delivery, and telecom baseband ASIC supply requiring stable component supply across extended temperature and long product lifecycles.

Supply support for LD59150PUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in automotive, industrial, and power management solutions with broad IP portfolios and vertical manufacturing capabilities.

The LD59150PUR belongs to ST's high-reliability LDO family designed specifically for AEC-Q100 automotive power rails and industrial edge computing-emphasizing low dropout, precise accuracy, and robust thermal/ESD performance.

FAQ

What is the minimum input voltage required to regulate 1.2 V output?

The LD59150PUR requires VIN ≥ VOUT + V_drop. At 1.5 A load and T_J = 25 °C, typical dropout is 65 mV, so minimum VIN = 1.265 V. At worst-case (125 mV max.), VIN must be ≥ 1.325 V. VBIAS must remain ≥ 2.7 V independently.

Can the PG pin drive a microcontroller GPIO directly?

Yes-the PG pin is open-drain with 1.5 mA sink capability and 0.3 V low-level voltage. A 10–100 kΩ pull-up to the MCU's VDDIO (≤5.5 V) provides clean logic-level signaling; no level-shifting needed for 3.3 V or 5 V GPIOs.

How does the VBIAS pin improve performance versus single-supply LDOs?

VBIAS powers internal references, error amplifiers, and bias circuits separately from VIN, reducing quiescent current by ~30% and improving PSRR by up to 15 dB at 300 kHz-especially valuable in noise-sensitive RF and high-speed serial applications.

Is the DFN10 package compatible with standard reflow profiles?

Yes-the LD59150PUR's DFN10 (3×3 mm) package is qualified for IPC/JEDEC J-STD-020 moisture sensitivity level 3 and supports standard lead-free reflow profiles (peak 260 °C). Wettable flanks require no special stencil design beyond standard 0.15 mm thickness.