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NXP Semiconductors LD6805K/12H,115
- Part No.:
- LD6805K/12H,115
- Manufacturer:
- NXP Semiconductors
- Package:
- 4-UDFN Exposed Pad
- Datasheet:
-
LD6805K/12H,115.pdf
- Description:
- IC REG LIN 1.2V 150MA DFN1010C-4
- Quantity:
- Payment:
- Shipping:
Inventory:1,032
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Product details
Overview
LD6805K/12H from NXP Semiconductors is a 1.2 V fixed-output, 150 mA low-dropout (LDO) regulator in a 1 × 1 mm DFN package, featuring 75 dB PSRR at 1 kHz, 250 mV dropout at full load, and high-ohmic (3-state) output during disable mode. It operates from 2.3 V to 5.5 V input and delivers ultra-low 40 µVRMS output noise for powering sensitive analog and digital circuitry in space-constrained portable devices.
For engineers reviewing the LD6805K/12H datasheet, LD6805K/12H pinout, LD6805K/12H application, or LD6805K/12H equivalent, this page provides verified technical context, real-world design meaning of key specs, validated pin functions, application-specific implementation guidance, and two confirmed alternative LDOs with documented functional and application-level differences.
Technical Context
The LD6805K/12H integrates a precision voltage reference, error amplifier, and PMOS pass transistor in monolithic silicon, enabling stable regulation with minimal headroom. Its high-ohmic disable state isolates the output without sinking current, preserving downstream bias integrity in power-gated subsystems.
Designed for mobile interface rails, it achieves 75 dB PSRR at 1 kHz via internal compensation and low-noise topology, while maintaining 150 µA typical quiescent current under load and 0.1 µA shutdown current - critical for battery longevity in always-on sensor or RF sections.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.2 V ±2% over −40 °C to +85 °C; enables direct powering of core logic or I/O rails requiring tight tolerance. |
| Max Output Current | 150 mA continuous; supports moderate-power peripherals like Bluetooth SoCs or display drivers without thermal derating on standard PCBs. |
| Dropout Voltage | 250 mV at 150 mA; allows operation down to 1.45 V input, extending battery runtime in single-cell Li-ion or Li-poly systems. |
| PSRR | 75 dB at 1 kHz; suppresses switching noise from adjacent DC-DC converters, preventing jitter in ADC references or PLL supplies. |
| Output Noise | 40 µVRMS (10 Hz–100 kHz); ensures clean bias for RF front-ends or high-resolution audio DACs without added filtering. |
| Enable Threshold | VIH = 1.1 V min, VIL = 0.4 V max; compatible with 1.8 V or 3.3 V GPIO control without level-shifting. |
| Shutdown Current | 0.1 µA typical; reduces system standby power by >99% versus active mode, essential for IoT endpoint sleep cycles. |
Pinout & Package
LD6805K/12H uses the DFN1010C-4 (SOT1194-1) package: 1 × 1 × 0.55 mm, thermally enhanced with exposed GND tab on underside. Recommended PCB layout connects tab to ground plane via multiple vias for optimal thermal performance (Rth(j-a) ≈ 250 K/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - OUT | Regulated output voltage node | Delivers stable 1.2 V; requires ≥1.0 µF X7R ceramic capacitor with ESR 5–500 mΩ for stability and controlled shutdown timing. |
| 2 - GND | Power and reference ground | Primary return path; must be connected to PCB ground plane; TAB is internally tied to GND and should be soldered for thermal management. |
| 3 - EN | Active-HIGH enable input | Drives regulator ON when ≥1.1 V; pulls output to high-impedance state when <0.4 V; no external pull-up required. |
| 4 - IN | Unregulated input supply | Accepts 2.3–5.5 V; benefits from local 1 µF ceramic decoupling to minimize input impedance at high frequencies. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-high PSRR | 75 dB at 1 kHz enables co-location with noisy DC-DC converters without compromising signal integrity in mixed-signal SoCs. |
| 3-State Disable Mode | High-ohmic output (LD6805K/xxH variant) prevents back-powering or leakage into powered-down domains - critical for domain isolation in mobile APs. |
| Low Output Noise | 40 µVRMS (10 Hz–100 kHz) eliminates need for post-regulation LC filters in RF bias chains, reducing BOM count and board area. |
| Fast Turn-On Time | 150 µs startup ensures rapid power sequencing for wake-from-sleep events in wearables and sensor hubs. |
| ESD Robustness | 6 kV HBM rating allows direct integration into handheld device front-end circuits without additional protection components. |
Applications
| Smartphone Application Processor Core Rail | Digital Camera Image Sensor Bias |
|---|---|
Use Scenario: Powering 1.2 V core voltage of application processors during active and dynamic voltage scaling modes. IC Role / Device Role / Timing Role: Primary LDO delivering tightly regulated, low-noise supply with fast transient response to meet DVFS timing requirements. Use Value: 250 mV dropout extends usable battery range; 75 dB PSRR prevents switching noise from PMIC DC-DC stages from inducing timing jitter in CPU clock paths. |
Use Scenario: Supplying analog bias voltage to CMOS image sensor pixel arrays and ADC front-ends. IC Role / Device Role / Timing Role: Low-noise, high-PSRR LDO ensuring stable reference for analog signal chain during exposure and readout phases. Use Value: 40 µVRMS noise directly limits image SNR; high-ohmic disable prevents dark current corruption during sensor idle periods. |
| Portable Media Player Audio Codec | Bluetooth LE SoC I/O Interface |
Use Scenario: Providing clean 1.2 V supply to stereo audio DACs and headphone amplifiers. IC Role / Device Role / Timing Role: Dedicated low-noise LDO isolating audio subsystem from shared system rail noise. Use Value: Ultra-low noise preserves dynamic range; 150 µs startup synchronizes cleanly with audio playback initiation without pop/click artifacts. |
Use Scenario: Powering 1.2 V I/O banks of Bluetooth 5.x SoCs interfacing with sensors or displays. IC Role / Device Role / Timing Role: Enable-controlled LDO supporting precise power gating of peripheral interfaces during BLE advertising/scanning intervals. Use Value: 0.1 µA shutdown current minimizes average power in duty-cycled applications; 3-state disable avoids bus contention during reset sequences. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS7A0512PDBVR | 1.2 V, 200 mA, 170 mV dropout, 50 dB PSRR @ 1 kHz, SOT-23-5 package (2.9 × 1.6 mm) | Larger footprint; lower PSRR reduces noise rejection in RF-dense layouts; higher output current suits higher-load peripherals. | Select when higher current headroom is needed and board area permits larger package; avoid where PSRR >70 dB is mandatory for RF/analog isolation. |
| MCP1700T-1202E/TT | 1.2 V, 250 mA, 600 mV dropout, 45 dB PSRR @ 1 kHz, SOT-23-3 package (2.9 × 1.3 mm) | Higher dropout limits use with low-VIN sources; lower PSRR and higher noise (110 µVRMS) require additional filtering for sensitive analog loads. | Choose for cost-sensitive, non-noise-critical digital rails where input voltage margin exceeds 1.8 V; not suitable for RF or high-resolution ADC applications. |
Compared with TPS7A0512PDBVR and MCP1700T-1202E/TT, the LD6805K/12H uniquely balances ultra-small 1 × 1 mm footprint, industry-leading 75 dB PSRR, and 250 mV dropout - making it the only option among the three that meets stringent noise, size, and efficiency requirements simultaneously in premium portable designs.
Availability
LD6805K/12H is available at Aetrix Electronics and suitable for smartphone application processor rails, digital camera image sensor bias, portable media player audio codecs, Bluetooth LE SoC I/O interfaces, and other portable electronics requiring stable component supply with guaranteed long-term availability.
Supply support for LD6805K/12H includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.
The LD6805 series belongs to NXP's precision analog power management portfolio, engineered specifically for miniaturized portable electronics demanding ultra-low noise, high PSRR, and sub-millimeter packaging - targeting next-generation smartphones, wearables, and IoT edge nodes.
FAQ
What is the maximum input voltage rating for the LD6805K/12H?
The LD6805K/12H has an absolute maximum input voltage of +6.0 V for transients up to 4 ms, with recommended operating range from 2.3 V to 5.5 V. Exceeding 6.0 V risks permanent damage per IEC 60134 limiting values. For sustained operation, stay within 5.5 V to ensure reliability across temperature and lifetime.
Does the LD6805K/12H require an external output capacitor, and what value is recommended?
Yes, the LD6805K/12H requires an external output capacitor for stability. The datasheet specifies a minimum of 0.7 µF and recommends 1.0 µF X7R ceramic with ESR between 5 mΩ and 500 mΩ. Using less than 0.7 µF may cause oscillation or poor transient response; exceeding 500 mΩ ESR degrades PSRR and startup behavior.
How does the high-ohmic disable mode of the LD6805K/12H function in practice?
When the EN pin is driven below 0.4 V, the LD6805K/12H disables its pass transistor and places the OUT pin in a high-impedance (3-state) condition - neither sourcing nor sinking current. This prevents back-powering of upstream circuits and avoids loading downstream components, unlike auto-discharge variants (e.g., LD6805K/12P) which actively pull OUT to GND.
What is the thermal resistance (Rth(j-a)) of the LD6805K/12H under standard PCB conditions?
The typical junction-to-ambient thermal resistance (Rth(j-a)) of the LD6805K/12H is 250 K/W when mounted on a two-layer PCB with the exposed GND tab properly connected to a solid ground plane. Performance improves significantly with multi-layer boards using internal copper layers and thermal vias - actual Rth(j-a) varies with layout but can reach ~120 K/W in optimized designs.
Is the LD6805K/12H RoHS compliant and halogen-free?
Yes, the LD6805K/12H is Pb-free, RoHS compliant, and free of halogen and antimony - meeting "dark green" compliance standards. This is confirmed in Section 1.2 of the official NXP product data sheet (Rev. 2, June 2012), and applies to all units manufactured under the SOT1194-1 package specification.
LD6805K/12H,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 4-UDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.2V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.25V @ 150mA
- Current - Output:
- 150mA
- Current - Quiescent (Iq):
- 35 µA
- Current - Supply (Max):
- 150 µA
- PSRR:
- 75dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Transient Voltage
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DFN1010C-4
LD6805K/12H,115 FAQ
1.How can I place an order for LD6805K/12H,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for LD6805K/12H,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD6805K/12H,115 reliable?
The price and inventory of LD6805K/12H,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD6805K/12H,115 is usually 5 days.
3.What payment methods are accepted for LD6805K/12H,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LD6805K/12H,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LD6805K/12H,115?
LD6805K/12H,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LD6805K/12H,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LD6805K/12H,115?
For technical support, including LD6805K/12H,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD6805K/12H,115 requirements.
6.How does Aetrix verify that LD6805K/12H,115 is sourced from the original manufacturer or authorized distributors?
All LD6805K/12H,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD6805K/12H,115 meets industry standards.
7.What is the process for return or replacement of LD6805K/12H,115?
All LD6805K/12H,115 units undergo pre-shipment inspection (PSI). If there is an issue with LD6805K/12H,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD6805K/12H,115 part is unused and in its original packaging.
Return procedure for LD6805K/12H,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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