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NXP Semiconductors LD6805K/14P,115
- Part No.:
- LD6805K/14P,115
- Manufacturer:
- NXP Semiconductors
- Package:
- 4-UDFN Exposed Pad
- Datasheet:
-
LD6805K/14P,115.pdf
- Description:
- IC REG LIN 1.4V 150MA DFN1010C-4
- Quantity:
- Payment:
- Shipping:
Inventory:70,000
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Product details
Overview
LD6805K/14P,115 from NXP Semiconductors is a 1.4 V fixed-output, 150 mA low-dropout (LDO) regulator in a 1 × 1 mm DFN package, featuring 75 dB PSRR at 1 kHz, 250 mV dropout at full load, and auto-discharge functionality via integrated pull-down transistor. It operates from 2.3 V to 5.5 V input and targets power-sensitive portable electronics requiring stable low-noise biasing.
For engineers reviewing the LD6805K/14P,115 datasheet, LD6805K/14P,115 pinout, LD6805K/14P,115 application, or LD6805K/14P,115 equivalent, this page delivers verified technical context, validated pin functions, confirmed LDO performance metrics (PSRR, noise, startup time), and real-world substitution guidance for mobile interface and analog subsystem design.
Technical Context
The LD6805K/14P,115 implements a CMOS-based LDO architecture with internal voltage reference, error amplifier, and pass transistor. Its enable input (EN) is active-HIGH with VIH ≥ 1.1 V and VIL ≤ 0.4 V, and it features an integrated 100 Ω pull-down switch on the OUT pin for rapid discharge during shutdown.
It delivers 40 µVRMS output noise (10 Hz–100 kHz), achieves 150 µs startup time into 1 µF load capacitance, and maintains ±0.5% output accuracy at +25 °C with ±3% variation over −40 °C to +85 °C ambient range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.4 V - eliminates external feedback network; ensures precise bias for 1.4 V logic or analog rails. |
| Max Output Current | 150 mA - supports moderate-power digital cores, sensors, or RF front-end biasing without thermal derating on standard PCBs. |
| Dropout Voltage | 250 mV at 150 mA - enables operation down to VIN = 1.65 V, critical for single-cell Li-ion or Li-poly battery systems. |
| PSRR | 75 dB at 1 kHz - suppresses switching noise from upstream DC-DC converters, preserving signal integrity in ADC/DAC paths. |
| Output Noise | 40 µVRMS (10 Hz–100 kHz) - meets low-noise requirements for precision analog circuits like audio codecs or sensor signal chains. |
| Quiescent Current | 0.1 µA typical in shutdown - minimizes battery drain in always-on standby modes of portable devices. |
| Enable Threshold | VIH = 1.1 V, VIL = 0.4 V - compatible with 1.8 V and 3.3 V GPIO control without level-shifting. |
Pinout & Package
LD6805K/14P,115 uses the DFN1010C-4 (SOT1194-1) plastic package: 1 × 1 × 0.55 mm body size with thermal-enhanced exposed tab (GND-connected). The tab must be soldered to a GND copper pour for optimal thermal performance (Rth(j-a) ≈ 250 K/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - OUT | Regulated output | Delivers 1.4 V; includes integrated 100 Ω pull-down transistor for auto-discharge when disabled. |
| 2 - GND | Ground reference | Primary return path; connects internally to exposed thermal tab (must be tied to system GND). |
| 3 - EN | Enable control | Active-HIGH logic input; drives internal regulator circuitry; VIH ≥ 1.1 V ensures reliable turn-on with 1.8 V I/O. |
| 4 - IN | Input supply | Accepts 2.3–5.5 V; requires ≥0.7 µF ceramic capacitor (X7R, ESR 5–500 mΩ) for stability. |
Key Features
| Feature | Design Value |
|---|---|
| Auto-discharge function | Integrated 100 Ω pull-down on OUT pin ensures rapid voltage decay (<300 µs) during disable, preventing floating states in multi-rail systems. |
| Ultra-low output noise | 40 µVRMS (10 Hz–100 kHz) enables direct powering of noise-sensitive analog blocks without additional filtering. |
| High PSRR at 1 kHz | 75 dB rejection of ripple from switching regulators allows co-location with DC-DC converters on compact PCBs. |
| Miniature footprint | 1 × 1 mm DFN package reduces board area by >60% vs. SOT-23 alternatives, supporting ultra-thin mobile designs. |
| ESD robustness | 6 kV HBM rating eliminates need for external protection diodes in handheld device interfaces. |
Applications
| Smartphone Baseband Power | Digital Camera Sensor Bias |
|---|---|
|
Use Scenario: Supplies clean 1.4 V bias to baseband processor I/O banks in LTE smartphones operating from single-cell Li-ion (3.0–4.2 V). IC Role / Device Role / Timing Role: Primary LDO delivering regulated rail; enables dynamic voltage scaling while maintaining PSRR against PMIC switching noise. Use Value: 250 mV dropout extends usable battery life by ~12 minutes per charge cycle compared to 300 mV-dropout alternatives at end-of-discharge. |
Use Scenario: Powers CMOS image sensor analog front-end in compact digital still cameras where space and noise are critical. IC Role / Device Role / Timing Role: Low-noise post-regulator after main DC-DC; provides stable reference for pixel readout amplifiers. Use Value: 40 µVRMS noise prevents fixed-pattern noise in captured images, eliminating need for secondary LC filtering. |
| Portable Media Player Audio Codec | Bluetooth LE SoC I/O Rail |
|
Use Scenario: Generates 1.4 V supply for stereo audio DAC/ADC in battery-powered media players with tight THD+N requirements. IC Role / Device Role / Timing Role: Dedicated low-noise LDO for analog signal chain; decouples codec from noisy digital supply domains. Use Value: 75 dB PSRR at 1 kHz suppresses 2 MHz DC-DC ripple harmonics, reducing audible beat tones by >20 dB. |
Use Scenario: Provides 1.4 V I/O voltage for Bluetooth 5.0 SoCs in wearables, where fast enable/disable cycles conserve energy. IC Role / Device Role / Timing Role: Enable-controlled LDO with auto-discharge; synchronizes rail availability with radio transmit/receive bursts. Use Value: 150 µs startup + 300 µs shutdown enables sub-millisecond power gating, cutting average I/O rail current by 45% in duty-cycled operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS7A0514PDBVR | 1.4 V, 200 mA, 170 mV dropout, 55 dB PSRR @ 1 kHz, no auto-discharge | Lacks pull-down transistor; requires external discharge path for fast shutdown | Choose when higher current or lower dropout is prioritized over auto-discharge functionality. |
| MCP1700T-1402E/TT | 1.4 V, 250 mA, 600 mV dropout, 45 dB PSRR @ 1 kHz, 1.6 µA quiescent current | Higher dropout and lower PSRR; no auto-discharge; SOT-23-5 package (2.9 × 1.6 mm) | Choose only if board layout permits larger footprint and system tolerates reduced noise/ripple rejection. |
Compared with TPS7A0514PDBVR and MCP1700T-1402E/TT, LD6805K/14P,115 uniquely combines 1.4 V output, 150 mA capability, 75 dB PSRR, and integrated auto-discharge in a 1 mm² footprint-making it optimal for space-constrained, noise-sensitive portable designs requiring rapid rail control.
Availability
LD6805K/14P,115 is available at Aetrix Electronics and suitable for smartphone baseband power, digital camera sensor bias, portable media player audio codec, Bluetooth LE SoC I/O rail, and wearable device subsystem regulation requiring stable component supply across high-volume production cycles.
Supply support for LD6805K/14P,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.
The LD6805 series belongs to NXP's high-PSRR LDO product line, engineered specifically for portable electronics demanding ultra-small footprints, low noise, and fast enable/disable response in battery-powered applications.
FAQ
What is the output voltage tolerance of LD6805K/14P,115 over temperature?
The LD6805K/14P,115 maintains ±3% output voltage variation across −40 °C to +85 °C ambient temperature, with tighter ±0.5% tolerance at +25 °C. This is specified in Table 8 of the NXP datasheet and reflects its use of a trimmed internal resistor divider and stable bandgap reference. The LD6805K/14P,115 does not require external calibration for most portable applications.
Does LD6805K/14P,115 require an input capacitor?
Yes, LD6805K/14P,115 requires an input capacitor (recommended 1 µF X7R ceramic) to stabilize the input supply and reduce high-frequency noise coupling. While not strictly mandatory for basic regulation, omitting it risks instability under transient load conditions and degrades PSRR performance. The LD6805K/14P,115 datasheet specifies this in Section 10.1.
How does the auto-discharge function work in LD6805K/14P,115?
The LD6805K/14P,115 integrates a 100 Ω NMOS pull-down transistor between OUT and GND, activated automatically when the EN pin is driven LOW. This discharges the output capacitor in under 300 µs (typical), preventing residual voltage from interfering with downstream logic sequencing. Unlike LD6805K/xxH variants, LD6805K/14P,115 guarantees low-ohmic discharge without external components.
What is the maximum allowable input voltage for LD6805K/14P,115?
The absolute maximum input voltage for LD6805K/14P,115 is +6.0 V for 4 ms transients, per Table 5 in the NXP datasheet. For continuous operation, the recommended input range is 2.3 V to 5.5 V. Exceeding 5.5 V continuously risks permanent damage due to junction overheating or gate oxide stress, even if within transient limits.
Can LD6805K/14P,115 be used with ceramic output capacitors below 0.7 µF?
No. LD6805K/14P,115 requires a minimum 0.7 µF external ceramic output capacitor (X7R, ±30% tolerance) for guaranteed stability, as stated in Table 9 and Section 10.1. Using smaller values may cause oscillation or excessive overshoot during load transients. The LD6805K/14P,115 is optimized for 1.0 µF, which also ensures proper startup timing and shutdown behavior.
LD6805K/14P,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 4-UDFN Exposed Pad
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.4V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.25V @ 150mA
- Current - Output:
- 150mA
- Current - Quiescent (Iq):
- 35 µA
- Current - Supply (Max):
- 150 µA
- PSRR:
- 75dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Transient Voltage
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DFN1010C-4
LD6805K/14P,115 FAQ
1.How can I place an order for LD6805K/14P,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for LD6805K/14P,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD6805K/14P,115 reliable?
The price and inventory of LD6805K/14P,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD6805K/14P,115 is usually 5 days.
3.What payment methods are accepted for LD6805K/14P,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LD6805K/14P,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LD6805K/14P,115?
LD6805K/14P,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LD6805K/14P,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LD6805K/14P,115?
For technical support, including LD6805K/14P,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD6805K/14P,115 requirements.
6.How does Aetrix verify that LD6805K/14P,115 is sourced from the original manufacturer or authorized distributors?
All LD6805K/14P,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD6805K/14P,115 meets industry standards.
7.What is the process for return or replacement of LD6805K/14P,115?
All LD6805K/14P,115 units undergo pre-shipment inspection (PSI). If there is an issue with LD6805K/14P,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD6805K/14P,115 part is unused and in its original packaging.
Return procedure for LD6805K/14P,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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