NXP Semiconductors LD6805K/25H,115
- Part No.:
- LD6805K/25H,115
- Manufacturer:
- NXP Semiconductors
- Package:
- 4-UDFN Exposed Pad
- Datasheet:
-
LD6805K/25H,115.pdf
- Description:
- IC REG LIN 2.5V 150MA DFN1010C-4
- Quantity:
- Payment:

- Shipping:

Inventory:40,000
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Product details
Overview
LD6805K/25H,115 from NXP Semiconductors is a 2.5 V fixed-output, 150 mA low-dropout (LDO) regulator in a 1 × 1 mm DFN package, featuring 75 dB PSRR at 1 kHz, 250 mV dropout at full load, and high-ohmic (3-state) output during disable mode. It operates from 2.3 V to 5.5 V input and delivers ultra-low 40 µVRMS output noise for powering noise-sensitive analog circuitry in portable consumer devices.
For engineers reviewing the LD6805K/25H,115 datasheet, LD6805K/25H,115 pinout, LD6805K/25H,115 application, or LD6805K/25H,115 equivalent, this page provides verified technical context, validated pin functions, confirmed thermal and noise performance, and real-world substitution guidance - all specific to the LD6805K/25H variant with high-ohmic disable behavior and SOT1194-1 packaging.
Technical Context
The LD6805K/25H,115 integrates a precision voltage reference, error amplifier, and PMOS pass transistor in monolithic silicon, enabling stable 2.5 V regulation across −40 °C to +85 °C ambient. Its architecture supports fast 150 µs startup and maintains 0.1 µA shutdown current via active-high enable control.
Unlike pull-down variants (e.g., LD6805K/25P), the /25H version places the output in high-impedance state when disabled - eliminating unintended discharge paths while preserving downstream node voltage integrity. ESD protection meets 6 kV HBM, and stability is guaranteed with ≥0.7 µF X7R output capacitance (1.0 µF typical).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 2.5 V ±2% over −40 °C to +85 °C; enables direct replacement of 2.5 V logic rails without external feedback. |
| Dropout Voltage | 250 mV at 150 mA; allows operation with only 2.75 V input, maximizing battery runtime in single-cell Li-ion or Li-poly systems. |
| PSRR | 75 dB at 1 kHz; suppresses switching noise from upstream DC-DC converters feeding sensitive RF or audio circuitry. |
| Output Noise | 40 µVRMS (10 Hz–100 kHz); ensures clean biasing for ADC references, PLL VCOs, and precision op-amps. |
| Enable Threshold | VIH = 1.1 V min, VIL = 0.4 V max; compatible with 1.8 V and 3.3 V GPIOs without level-shifting. |
| Thermal Resistance | Rth(j-a) = 250 K/W (typical); requires PCB copper pour under exposed tab for sustained 150 mA operation at +85 °C ambient. |
| Shutdown Current | 0.1 µA typical; reduces system standby power in always-on sensor nodes or IoT edge devices. |
Pinout & Package
LD6805K/25H,115 uses the DFN1010C-4 (SOT1194-1) plastic package: 1 × 1 × 0.55 mm body with exposed thermal pad (TAB) on underside, rated for 250 K/W junction-to-ambient thermal resistance when connected to GND plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - OUT | Regulated output voltage node | Delivers stable 2.5 V; must be decoupled with ≥0.7 µF X7R ceramic capacitor; high-ohmic when EN = LOW. |
| 2 - GND | Power and reference ground | Common return for IN, OUT, and EN; TAB (underside) is internally connected to GND and must be soldered to PCB ground plane. |
| 3 - EN | Active-high enable input | Drives internal bandgap reference and pass transistor gate; pulled down internally; requires ≥1.1 V to activate regulator. |
| 4 - IN | Unregulated input supply | Accepts 2.3–5.5 V; requires local 1 µF ceramic input capacitor; dropout defined as VIN − VOUT ≥ 250 mV at 150 mA. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-high PSRR | 75 dB at 1 kHz enables use after noisy buck converters without additional filtering stages. |
| High-ohmic disable | Output floats to preserve voltage on downstream capacitors - critical for retention memory or isolated subsystems. |
| Low-noise regulation | 40 µVRMS noise supports 12+ bit ADC accuracy and jitter-sensitive clock generation. |
| Miniature footprint | 1 × 1 mm DFN saves >70% board area vs. SOT-23 packages, ideal for space-constrained mobile modules. |
| Robust ESD protection | 6 kV HBM rating eliminates need for external TVS diodes in handheld device front-end designs. |
Applications
| Smartphone Baseband Power | Digital Camera Image Sensor Bias |
|---|---|
Use Scenario: Supplying 2.5 V to baseband processor I/O banks in LTE/5G handsets where input rail shares noisy DC-DC output. IC Role / Device Role / Timing Role: LDO regulator providing clean, low-noise 2.5 V rail with fast transient response to burst-mode processing loads. Use Value: 75 dB PSRR rejects switcher ripple; 150 µs startup synchronizes with processor wake-up sequences without brownout. |
Use Scenario: Biasing CMOS image sensor analog front-end (AFE) in compact digital still cameras. IC Role / Device Role / Timing Role: Low-noise voltage source for sensor pixel readout and column amplifiers requiring stable DC offset. Use Value: 40 µVRMS noise prevents fixed-pattern noise in captured images; high-ohmic disable preserves sensor bias during frame blanking. |
| Portable Media Player Audio Codec | GPS Module Reference Voltage |
Use Scenario: Powering DAC and headphone amplifier stages in battery-powered media players. IC Role / Device Role / Timing Role: Ultra-low-noise 2.5 V supply for audio signal chain components sensitive to supply-induced distortion. Use Value: Sub-50 µV RMS noise avoids audible hiss; 250 mV dropout extends playback time by enabling operation down to 2.75 V battery voltage. |
Use Scenario: Providing stable 2.5 V reference to GPS receiver RF front-end and correlator circuits in personal navigation devices. IC Role / Device Role / Timing Role: Precision LDO delivering low-drift, low-noise bias for crystal oscillator buffers and low-noise amplifiers. Use Value: ±2% output accuracy and 75 dB PSRR maintain timing stability and carrier-to-noise ratio (C/N₀) under varying battery and RF interference conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6206P252MR-G | 2.5 V fixed, 150 mA, SOT-23-5 package; 65 dB PSRR at 1 kHz; 300 mV dropout; no enable pin. | Lacks EN control and high-ohmic disable; requires external logic for sequencing; larger footprint. | Choose when board space permits SOT-23 and enable functionality is unnecessary. |
| Richtek RT9013-25PB | 2.5 V fixed, 300 mA, DFN1010-4; 68 dB PSRR at 1 kHz; 200 mV dropout; active-low enable. | Higher current capability but lower PSRR; active-low EN requires inverter for GPIO compatibility. | Prefer when higher load margin is needed and PSRR >70 dB is acceptable; verify EN polarity match. |
Compared with XC6206P252MR-G and RT9013-25PB, LD6805K/25H,115 uniquely combines 75 dB PSRR, 250 mV dropout, high-ohmic disable, and 1 × 1 mm footprint - making it optimal for miniaturized, noise-critical portable systems where both size and signal integrity are constrained.
Availability
LD6805K/25H,115 is available at Aetrix Electronics and suitable for smartphone baseband power, digital camera image sensor bias, portable media player audio codec supplies, and GPS module reference voltage applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.
Supply support for LD6805K/25H,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and consumer markets, with deep expertise in power management and analog IC design.
The LD6805 series was designed specifically for ultra-miniaturized portable electronics demanding high PSRR, low noise, and minimal board area - targeting next-generation smartphones, wearables, and IoT edge sensors.
FAQ
What is the exact output voltage tolerance of LD6805K/25H,115 over temperature?
The LD6805K/25H,115 delivers 2.5 V output with ±2% tolerance over the full operating range of −40 °C to +85 °C ambient temperature. At +25 °C, the variation tightens to ±0.5%, and the device maintains this accuracy without external trimming or calibration - confirmed in Table 8 of the NXP product data sheet Rev. 2.
Does LD6805K/25H,115 require an external output capacitor, and what type is recommended?
Yes, LD6805K/25H,115 requires a minimum 0.7 µF external output capacitor for stability, with 1.0 µF X7R ceramic recommended per Table 9 and Section 10.1. The capacitor must have ESR between 5 mΩ and 500 mΩ; tantalum or aluminum electrolytics are not supported due to ESR and aging limitations.
How does the high-ohmic disable mode of LD6805K/25H,115 differ from auto-discharge variants like LD6805K/25P?
When disabled (EN < 0.4 V), LD6805K/25H,115 places the OUT pin in high-impedance state - isolating downstream circuitry and preserving stored charge. In contrast, LD6805K/25P actively pulls OUT to GND via an internal ~100 Ω transistor. This makes LD6805K/25H,115 suitable for retention-biased systems where voltage hold is required.
What is the thermal performance of LD6805K/25H,115 under continuous 150 mA load?
With proper PCB layout - including soldering the exposed TAB to a solid GND copper pour - LD6805K/25H,115 achieves a typical Rth(j-a) of 250 K/W. At 150 mA and 2.75 V input (250 mV dropout), power dissipation is 37.5 mW, resulting in ~9.4 °C junction rise above ambient - well within the +125 °C max Tj limit.
Is LD6805K/25H,115 compatible with lead-free reflow processes?
Yes, LD6805K/25H,115 is qualified for lead-free reflow per J-STD-020C. Its DFN1010C-4 package (volume <350 mm³, thickness <1.6 mm) has a maximum peak reflow temperature of 260 °C. The device is RoHS-compliant, halogen-free, and dark green compliant per Section 1.2 of the datasheet.
LD6805K/25H,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 4-UDFN Exposed Pad
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 2.5V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.25V @ 150mA
- Current - Output:
- 150mA
- Current - Quiescent (Iq):
- 35 µA
- Current - Supply (Max):
- 150 µA
- PSRR:
- 75dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Transient Voltage
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DFN1010C-4
LD6805K/25H,115 FAQ
1.How can I place an order for LD6805K/25H,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for LD6805K/25H,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD6805K/25H,115 reliable?
The price and inventory of LD6805K/25H,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD6805K/25H,115 is usually 5 days.
3.What payment methods are accepted for LD6805K/25H,115?
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4.How is shipping managed for LD6805K/25H,115?
LD6805K/25H,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LD6805K/25H,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LD6805K/25H,115?
For technical support, including LD6805K/25H,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD6805K/25H,115 requirements.
6.How does Aetrix verify that LD6805K/25H,115 is sourced from the original manufacturer or authorized distributors?
All LD6805K/25H,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD6805K/25H,115 meets industry standards.
7.What is the process for return or replacement of LD6805K/25H,115?
All LD6805K/25H,115 units undergo pre-shipment inspection (PSI). If there is an issue with LD6805K/25H,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD6805K/25H,115 part is unused and in its original packaging.
Return procedure for LD6805K/25H,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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