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NXP Semiconductors LD6805K/33P,115
- Part No.:
- LD6805K/33P,115
- Manufacturer:
- NXP Semiconductors
- Package:
- 4-UDFN Exposed Pad
- Datasheet:
-
LD6805K/33P,115.pdf
- Description:
- IC REG LIN 3.3V 150MA DFN1010C-4
- Quantity:
- Payment:
- Shipping:
Inventory:3,216
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Product details
Overview
LD6805K/33P,115 from NXP Semiconductors is a 3.3 V fixed-output, 150 mA low-dropout (LDO) regulator in a 1 × 1 mm DFN package, featuring 75 dB PSRR at 1 kHz, 250 mV dropout at full load, and auto-discharge functionality via integrated pull-down transistor. It delivers ultra-low 40 µVRMS output noise and supports portable power rails for RF and analog circuitry in space-constrained mobile devices.
For engineers reviewing the LD6805K/33P,115 datasheet, LD6805K/33P,115 pinout, LD6805K/33P,115 application, or LD6805K/33P,115 equivalent, this page provides verified technical context, validated pin functions, confirmed thermal and noise performance, and real-world use cases in battery-powered consumer electronics requiring stable, low-noise 3.3 V supply with fast enable control and automatic output discharge.
Technical Context
The LD6805K/33P,115 integrates a precision voltage reference, error amplifier, and PMOS pass transistor optimized for high PSRR and low quiescent current. Its enable input (active HIGH) controls both regulation and the internal 100 Ω pull-down switch that actively discharges the output capacitor during shutdown.
This LDO operates across 2.3 V to 5.5 V input range and maintains ±2% output accuracy over −40 °C to +85 °C ambient, with 150 µA typical quiescent current under load and only 0.1 µA in shutdown - enabling efficient power sequencing in multi-rail systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 3.3 V ±2% over temperature and load - ensures stable biasing for 3.3 V logic, RF front-ends, and analog sensors without external feedback. |
| Dropout Voltage | 250 mV at 150 mA - enables operation down to 3.55 V input, maximizing battery runtime in single-cell Li-ion or Li-poly systems. |
| PSRR | 75 dB at 1 kHz - suppresses switching noise from upstream DC-DC converters, critical for noise-sensitive ADCs and PLLs. |
| Output Noise | 40 µVRMS (10 Hz–100 kHz) - minimizes jitter and quantization error in precision analog signal chains. |
| Enable Threshold | VIH = 1.1 V min, VIL = 0.4 V max - compatible with 1.8 V and 3.3 V GPIOs for clean digital control without level-shifting. |
| Shutdown Current | 0.1 µA typical - reduces system standby power in always-on applications like Bluetooth LE peripherals. |
| Startup Time | 150 µs to 95% of 3.3 V - supports fast wake-up sequences in responsive portable devices. |
Pinout & Package
LD6805K/33P,115 is housed in a thermally enhanced DFN1010C-4 (SOT1194-1) plastic package measuring 1.0 × 1.0 × 0.55 mm, with exposed thermal pad (TAB) on underside connected internally to GND. Recommended PCB layout uses solid copper pour under the TAB connected to ground plane via multiple vias for optimal thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: OUT | Regulated output voltage node | Delivers stable 3.3 V to load; requires ≥0.7 µF X7R ceramic capacitor with ESR 5–500 mΩ for stability. |
| 2: GND | Supply ground reference | Primary return path for load current and internal bias; must be low-impedance connection to system ground plane. |
| 3: EN | Active-HIGH enable input | Drives internal regulator and pull-down transistor; logic HIGH ≥1.1 V enables regulation and disables auto-discharge. |
| 4: IN | Input voltage supply | Accepts 2.3–5.5 V; requires local 1 µF ceramic decoupling capacitor near pin for transient response. |
Key Features
| Feature | Design Value |
|---|---|
| Auto-discharge function | Integrated 100 Ω pull-down transistor actively discharges output capacitor during disable - prevents floating voltage and enables safe hot-swap or power sequencing. |
| Ultra-low output noise | 40 µVRMS (10 Hz–100 kHz) - eliminates need for additional LC filtering in sensitive analog subsystems. |
| High PSRR architecture | 75 dB at 1 kHz, maintained >50 dB up to 100 kHz - rejects ripple from switching regulators without external compensation. |
| Thermal-enhanced DFN | DFN1010C-4 package with Rth(j-a) = 250 K/W - supports 150 mA continuous output in compact layouts with minimal heatsinking. |
| Robust ESD protection | 6 kV HBM - withstands handling and board assembly stress without external protection diodes. |
Applications
| Smartphone Baseband Power | Wi-Fi/Bluetooth RF Front-End |
|---|---|
Use Scenario: Supplies clean 3.3 V to baseband processor I/O banks and memory interfaces in LTE/5G handsets. IC Role / Device Role / Timing Role: Primary low-noise post-regulator after main PMIC, providing stable voltage during burst data transmission. Use Value: 75 dB PSRR prevents DC-DC switching noise from corrupting high-speed digital signaling, maintaining BER integrity. |
Use Scenario: Powers RF transceiver ICs and PA bias circuits in dual-band Wi-Fi 6 and Bluetooth 5.3 modules. IC Role / Device Role / Timing Role: Low-noise LDO delivering regulated 3.3 V to RF synthesizers and mixer stages. Use Value: 40 µVRMS noise minimizes phase noise in local oscillators, preserving EVM and adjacent channel rejection. |
| Digital Still Camera Sensor Bias | Portable Media Player Audio Codec |
Use Scenario: Provides precision 3.3 V bias to CMOS image sensor analog front-end and ADC reference. IC Role / Device Role / Timing Role: Dedicated LDO for image sensor power domain, enabled synchronously with exposure timing. Use Value: 150 µs startup time aligns with frame capture sequence; auto-discharge prevents residual charge from causing image artifacts. |
Use Scenario: Supplies 3.3 V to stereo audio codec and headphone amplifier in flash-based media players. IC Role / Device Role / Timing Role: Low-quiescent LDO supporting playback and standby modes with rapid enable/disable. Use Value: 0.1 µA shutdown current extends battery life during pause/idle states without compromising wake-up latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6219B332MR-G | 3.3 V fixed, 150 mA, 200 mV dropout, no auto-discharge, SOT-25 package (2.9 × 2.8 mm) | Larger footprint, lacks pull-down transistor - requires external discharge circuit for hot-swap safety. | Select when board area allows larger package and auto-discharge is not required for system-level sequencing. |
| Richtek RT9013-33GB | 3.3 V fixed, 300 mA, 250 mV dropout, 60 dB PSRR @ 1 kHz, SOT-23-5 package | Higher current rating but lower PSRR and no integrated auto-discharge - less suitable for noise-critical RF loads. | Select when higher output current is needed and PSRR >70 dB is not mandatory for the target signal chain. |
Compared with XC6219B332MR-G and RT9013-33GB, the LD6805K/33P,115 uniquely combines ultra-high PSRR, ultra-low noise, and integrated auto-discharge in a 1 mm² footprint - making it optimal for miniaturized, noise-sensitive portable designs where output voltage stability and fast, safe power cycling are essential.
Availability
LD6805K/33P,115 is available at Aetrix Electronics and suitable for smartphone baseband power, Wi-Fi/Bluetooth RF front-end supply, digital camera sensor bias, portable media player audio codec, and other portable electronics requiring stable component supply with guaranteed long-term sourcing.
Supply support for LD6805K/33P,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.
The LD6805 series was designed specifically for ultra-compact, high-PSRR power management in battery-powered mobile devices - targeting applications demanding minimal board area, low noise, and robust power sequencing behavior.
FAQ
What is the maximum input voltage rating for LD6805K/33P,115?
The absolute maximum input voltage for LD6805K/33P,115 is +6.0 V for 4 ms transients, with recommended operating range from 2.3 V to 5.5 V. Exceeding 5.5 V continuously risks exceeding thermal limits and violating safe operating area - always verify input source regulation and transient suppression in final design. The LD6805K/33P,115 must be operated within these bounds to ensure reliability and specified performance.
Does LD6805K/33P,115 require an external output capacitor, and what value is recommended?
Yes, LD6805K/33P,115 requires an external output capacitor for stability: minimum 0.7 µF, recommended 1.0 µF X7R ceramic with ESR between 5 mΩ and 500 mΩ. This capacitor directly affects startup time, load transient response, and shutdown discharge behavior. Using the recommended value ensures compliance with the 150 µs startup and 300 µs shutdown specifications stated in the LD6805K/33P,115 datasheet.
How does the auto-discharge function work in LD6805K/33P,115?
When the EN pin is driven LOW, LD6805K/33P,115 disables regulation and activates an internal 100 Ω pull-down transistor between OUT and GND, actively discharging the output capacitor. This prevents residual voltage from floating or interfering with downstream logic states during power-down sequences. The LD6805K/33P,115 achieves full discharge in ~300 µs with a 1 µF load capacitor - critical for hot-swap and multi-rail sequencing.
What is the thermal resistance (Rth(j-a)) of LD6805K/33P,115 under standard PCB conditions?
The typical junction-to-ambient thermal resistance (Rth(j-a)) of LD6805K/33P,115 is 250 K/W when mounted on a two-layer PCB with recommended layout: solid GND copper under the exposed TAB connected via multiple vias to inner ground plane. Performance degrades significantly if the TAB is left unconnected or covered with solder mask - proper thermal design is essential to sustain 150 mA continuous output. This value applies directly to the LD6805K/33P,115 in its DFN1010C-4 package.
Is LD6805K/33P,115 RoHS compliant and halogen-free?
Yes, LD6805K/33P,115 is Pb-free, RoHS compliant, and free of halogen and antimony - meeting "dark green" environmental compliance standards. This is confirmed in Section 1.2 of the official NXP product data sheet (Rev. 2, 25 June 2012), which explicitly states compliance with EU RoHS Directive 2011/65/EU and halogen-free requirements. The LD6805K/33P,115 is suitable for environmentally regulated consumer and portable electronics markets.
LD6805K/33P,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 4-UDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.25V @ 150mA
- Current - Output:
- 150mA
- Current - Quiescent (Iq):
- 35 µA
- Current - Supply (Max):
- 150 µA
- PSRR:
- 75dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Transient Voltage
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DFN1010C-4
LD6805K/33P,115 FAQ
1.How can I place an order for LD6805K/33P,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for LD6805K/33P,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD6805K/33P,115 reliable?
The price and inventory of LD6805K/33P,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD6805K/33P,115 is usually 5 days.
3.What payment methods are accepted for LD6805K/33P,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LD6805K/33P,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LD6805K/33P,115?
LD6805K/33P,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LD6805K/33P,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LD6805K/33P,115?
For technical support, including LD6805K/33P,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD6805K/33P,115 requirements.
6.How does Aetrix verify that LD6805K/33P,115 is sourced from the original manufacturer or authorized distributors?
All LD6805K/33P,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD6805K/33P,115 meets industry standards.
7.What is the process for return or replacement of LD6805K/33P,115?
All LD6805K/33P,115 units undergo pre-shipment inspection (PSI). If there is an issue with LD6805K/33P,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD6805K/33P,115 part is unused and in its original packaging.
Return procedure for LD6805K/33P,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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