NXP Semiconductors LD6806CX4/13P,315
- Part No.:
- LD6806CX4/13P,315
- Manufacturer:
- NXP Semiconductors
- Package:
- 4-XFBGA, WLCSP
- Datasheet:
-
LD6806CX4/13P,315.pdf
- Description:
- IC REG LINEAR 1.3V 200MA 4WLCSP
- Quantity:
- Payment:

- Shipping:

Inventory:18,000
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Product details
Overview
LD6806CX4/13P,315 from NXP Semiconductors is a 1.3 V, 200 mA ultra-low-dropout linear regulator in WLCSP4 (0.76 mm × 0.76 mm) package with 60 mV dropout at full load, 30 µVRMS output noise (10 Hz–100 kHz), and active-HIGH enable pin. It delivers stable low-noise power for space-constrained mobile interfaces requiring precise 1.3 V supply.
For engineers reviewing the LD6806CX4/13P,315 datasheet, LD6806CX4/13P,315 pinout, LD6806CX4/13P,315 application, or LD6806CX4/13P,315 equivalent, key selection criteria include its 1.3 V fixed output, low-ohmic pull-down on disable (P-suffix), thermal shutdown at 160 °C, and compatibility with 1 µF X7R ceramic output capacitors in high-density PCB layouts.
Technical Context
The LD6806CX4/13P,315 uses a monolithic silicon LDO architecture with internal reference generator, current limiter, and thermal protection circuitry. Its pass transistor operates in linear mode with minimal voltage headroom, enabling regulation down to VIN = VOUT + 60 mV at 200 mA.
It features an active-HIGH enable input (VIH ≥ 1.4 V, VIL ≤ 0.4 V), integrated 10 kV HBM ESD protection, and a dedicated pull-down switch that forces OUT to near-GND during disable-distinguishing it from H-suffix variants with high-impedance shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.3 V ±3% over −40 °C to +85 °C ambient; ensures stable core voltage for 1.3 V logic rails. |
| Dropout Voltage | 60 mV typical at 200 mA; enables operation with only 1.36 V input, critical for battery-powered systems near end-of-discharge. |
| Noise (RMS) | 30 µV over 10 Hz–100 kHz bandwidth; supports noise-sensitive analog circuits like ADC references or RF biasing. |
| PSRR | −55 dB at 1 kHz; suppresses switching noise from upstream DC-DC converters feeding the LDO input. |
| Quiescent Current | 70 µA typical at 200 mA load; maintains efficiency in always-on subsystems without compromising transient response. |
| Enable Threshold | VIH = 1.4 V min, VIL = 0.4 V max; compatible with 1.8 V and 3.3 V GPIOs without level-shifting. |
| Shutdown Current | 0.1 µA typical; reduces system standby power in portable devices with frequent sleep/wake cycles. |
Pinout & Package
LD6806CX4/13P,315 is housed in a wafer-level chip-scale package (WLCSP4) measuring 0.76 mm × 0.76 mm × 0.47 mm with 0.4 mm pitch bumps. The package has no leads and requires reflow soldering; wave soldering is not supported.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND | Supply ground | Primary return path for load current and internal bias; must connect to solid ground plane for thermal and noise performance. |
| EN | Enable input (active HIGH) | Controls regulator state; drives OUT low via internal pull-down transistor when EN < 0.4 V. |
| OUT | Regulated output voltage | Delivers 1.3 V to load; requires ≥1.0 µF X7R ceramic capacitor with 5–500 mΩ ESR for stability. |
| IN | Supply voltage input | Accepts 2.3 V–5.5 V input; must be decoupled with ≥1.0 µF capacitor close to the pin. |
Key Features
| Feature | Design Value |
|---|---|
| Low-ohmic shutdown | Internal pull-down transistor (Rpd = 100 Ω typ.) actively discharges OUT during disable-prevents floating nodes in multi-rail systems. |
| Ultra-low noise | 30 µVRMS output noise enables clean power for precision analog blocks without external filtering. |
| Fast start-up | 200 µs turn-on time allows rapid wake-up from deep sleep modes in battery-operated devices. |
| Thermal watchdog | Shuts down at 160 °C junction temperature with 20 K hysteresis, protecting against sustained overload or poor heatsinking. |
| Pb-free & halogen-free | RoHS-compliant, dark green marking; meets environmental requirements for consumer and industrial end products. |
Applications
| Mobile Phone Baseband Core | Bluetooth Audio Codec Power |
|---|---|
Use Scenario: Powers 1.3 V baseband processor core in GSM/WCDMA smartphones during active call and data sessions. IC Role / Device Role / Timing Role: Primary low-noise, low-dropout voltage regulator supplying digital logic core with tight voltage tolerance and fast transient response. Use Value: Enables extended battery life via 60 mV dropout and 70 µA quiescent current while maintaining 1.3 V accuracy across temperature. | Use Scenario: Supplies 1.3 V bias to stereo audio DAC and analog front-end in Bluetooth earbuds and headsets. IC Role / Device Role / Timing Role: Low-noise LDO providing clean analog supply independent of noisy digital switching rails. Use Value: 30 µVRMS noise prevents audible artifacts; 200 µs start-up synchronizes with Bluetooth link establishment. |
| Wearable Sensor Hub | IoT Edge Node MCU Core |
Use Scenario: Regulates power to ultra-low-power sensor fusion hub (accelerometer, gyroscope, magnetometer) in fitness trackers. IC Role / Device Role / Timing Role: Always-on LDO with sub-1 µA shutdown current, activated only during sensor readout bursts. Use Value: Pull-down shutdown prevents back-powering of disabled sensors; 0.1 µA IQ in shutdown extends multi-week battery life. | Use Scenario: Delivers 1.3 V to ARM Cortex-M0+ MCU core in LPWAN edge nodes operating on coin-cell batteries. IC Role / Device Role / Timing Role: Fixed-output LDO supporting deep-sleep wake-up sequences with minimal voltage deviation. Use Value: ±3% output accuracy over −40 °C to +85 °C ensures reliable MCU operation across outdoor deployment environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LD6806CX4/13H,315 | Same package and output voltage, but high-ohmic (3-state) shutdown instead of pull-down. | Used where output must float during disable (e.g., shared bus lines); unsuitable when active discharge is required. | Select LD6806CX4/13P,315 when downstream circuitry requires forced GND discharge on disable. |
| Torex XC6219B132MR-G | 1.3 V, 200 mA LDO in SOT-25; 120 mV dropout, 45 µVRMS noise, no integrated pull-down. | Requires external discharge circuitry for active-low shutdown behavior; larger footprint than WLCSP4. | Choose when board space permits SOT-25 and thermal budget allows higher dropout. |
Compared with LD6806CX4/13H,315, the LD6806CX4/13P,315 provides guaranteed low-ohmic output discharge during disable-critical for preventing latch-up in multi-voltage domain systems. Versus XC6219B132MR-G, it offers superior noise performance and 40% lower dropout in a 60% smaller footprint, though with tighter layout constraints for WLCSP reflow.
Availability
LD6806CX4/13P,315 is available at Aetrix Electronics and suitable for mobile handset power management, wearable sensor hubs, Bluetooth audio subsystems, and IoT edge node designs requiring stable component supply and long-term lifecycle support.
Supply support for LD6806CX4/13P,315 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.
The LD6806 series was designed specifically for miniaturized portable electronics requiring ultra-low-noise, ultra-low-dropout regulation in sub-1 mm² footprints-targeting mobile phone handsets, cordless telephones, and personal digital assistants.
FAQ
What is the nominal output voltage of the LD6806CX4/13P,315?
The LD6806CX4/13P,315 delivers a fixed nominal output voltage of 1.3 V, with guaranteed accuracy of ±3% over the full operating temperature range (−40 °C to +85 °C ambient). This value is laser-trimmed during manufacturing and does not require external resistors or configuration pins.
Does the LD6806CX4/13P,315 include thermal protection?
Yes, the LD6806CX4/13P,315 integrates a thermal shutdown circuit that disables the regulator when junction temperature reaches 160 °C, with 20 K hysteresis to prevent oscillation. Recovery occurs automatically once the die cools below 140 °C, ensuring robust operation under overload or poor thermal conditions.
How does the enable pin function on the LD6806CX4/13P,315?
The EN pin on the LD6806CX4/13P,315 is active HIGH: the regulator powers up when EN voltage exceeds 1.4 V and shuts down when EN falls below 0.4 V. During shutdown, the internal pull-down transistor connects OUT to GND (Rpd = 100 Ω typ.), actively discharging the output node.
What output capacitor is required for stable operation of the LD6806CX4/13P,315?
The LD6806CX4/13P,315 requires a minimum 1.0 µF X7R ceramic capacitor at the OUT pin, with ESR between 5 mΩ and 500 mΩ. The capacitor must maintain ≥0.7 µF capacitance across −40 °C to +125 °C, making X7R grade essential for full temperature specification compliance.
Is the LD6806CX4/13P,315 compatible with lead-free reflow processes?
Yes, the LD6806CX4/13P,315 is Pb-free and RoHS-compliant, qualified for lead-free reflow soldering per J-STD-020C. Its WLCSP4 package (0.47 mm thickness) falls into the <1.6 mm category, requiring a peak reflow temperature of 260 °C; wave soldering is not supported.
LD6806CX4/13P,315 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 4-XFBGA, WLCSP
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.1V @ 200mA
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 100 µA
- Current - Supply (Max):
- 250 µA
- PSRR:
- 55dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 4-WLCSP (0.76x0.76)
LD6806CX4/13P,315 FAQ
1.How can I place an order for LD6806CX4/13P,315 through Aetrix?
Please submit a Request for Quotation (RFQ) for LD6806CX4/13P,315 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD6806CX4/13P,315 reliable?
The price and inventory of LD6806CX4/13P,315 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD6806CX4/13P,315 is usually 5 days.
3.What payment methods are accepted for LD6806CX4/13P,315?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LD6806CX4/13P,315 transactions.
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4.How is shipping managed for LD6806CX4/13P,315?
LD6806CX4/13P,315 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LD6806CX4/13P,315 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LD6806CX4/13P,315?
For technical support, including LD6806CX4/13P,315 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD6806CX4/13P,315 requirements.
6.How does Aetrix verify that LD6806CX4/13P,315 is sourced from the original manufacturer or authorized distributors?
All LD6806CX4/13P,315 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD6806CX4/13P,315 meets industry standards.
7.What is the process for return or replacement of LD6806CX4/13P,315?
All LD6806CX4/13P,315 units undergo pre-shipment inspection (PSI). If there is an issue with LD6806CX4/13P,315, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD6806CX4/13P,315 part is unused and in its original packaging.
Return procedure for LD6806CX4/13P,315:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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