NXP Semiconductors LD6806CX4/C33P,315
- Part No.:
- LD6806CX4/C33P,315
- Manufacturer:
- NXP Semiconductors
- Package:
- 4-XFBGA, WLCSP
- Datasheet:
-
LD6806CX4/C33P,315.pdf
- Description:
- IC REG LINEAR FIXED LDO REG
- Quantity:
- Payment:

- Shipping:

Inventory:18,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LD6806CX4/C33P,315 from NXP Semiconductors is a 3.3 V, 200 mA ultra-low-dropout linear regulator in a 0.4 mm pitch WLCSP4 package with 60 mV dropout at full load, 30 µV RMS output noise (10 Hz–100 kHz), and active-HIGH enable control-designed for power-sensitive mobile handset and media player subsystems requiring stable low-noise bias.
For engineers reviewing the LD6806CX4/C33P,315 datasheet, LD6806CX4/C33P,315 pinout, LD6806CX4/C33P,315 application, or LD6806CX4/C33P,315 equivalent, this page delivers verified electrical specs, thermal behavior, enable threshold validation, shutdown pull-down resistance, and package-level soldering footprint data aligned to Rev. 3 (2011) product documentation.
Technical Context
The LD6806CX4/C33P,315 implements a PMOS pass transistor architecture enabling 60 mV dropout at 200 mA while maintaining 55 dB PSRR at 1 kHz and 30 µV RMS noise. Its internal reference generator and feedback loop are optimized for stability with ≥1.0 µF X7R ceramic output capacitance and support fast 200 µs startup under 200 mA load.
Thermal protection triggers at 160 °C with 20 K hysteresis, and overcurrent limiting caps peak output at 300 mA (for VO(nom) > 1.8 V). The device features integrated 10 kV HBM ESD protection and operates across −40 °C to +85 °C ambient, with junction temperature limited to +125 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltage | 3.3 V nominal, ±2% over −30 °C to +85 °C ambient - ensures stable core/bias rail for 3.3 V logic and analog interfaces |
| Dropout voltage | 60 mV typical at 200 mA - enables operation down to VIN = 3.36 V, critical for battery-powered systems near end-of-discharge |
| Noise (RMS) | 30 µV (10 Hz–100 kHz) - supports low-noise RF, audio, and precision ADC/DAC supply domains |
| PSRR | −55 dB at 1 kHz - suppresses switching noise from upstream DC-DC converters feeding the LDO input |
| Enable threshold | VIL ≤ 0.4 V, VIH ≥ 1.4 V - compatible with 1.8 V/3.3 V GPIO without level-shifting |
| Pull-down resistance | 100 Ω typical when disabled - actively discharges output to prevent floating or unintended wake-up in sleep states |
| Quiescent current | 0.1–1.0 µA in shutdown, 70–250 µA active - extends battery life in always-on sensor or standby circuits |
Pinout & Package
LD6806CX4/C33P,315 uses a wafer-level chip-scale package (WLCSP4) with 0.4 mm pitch, dimensions 0.76 mm × 0.76 mm × 0.51 mm (typ), Pb-free and halogen-free compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND | Supply ground | Primary return path for regulator current; must connect to solid PCB ground plane for thermal and noise performance |
| EN | Enable input (active HIGH) | Logic-controlled on/off; pulled LOW disables regulator and activates 100 Ω pull-down to OUT |
| OUT | Regulated output voltage | 3.3 V output node; requires ≥1.0 µF X7R ceramic capacitor with 5–500 mΩ ESR for stability |
| IN | Supply voltage input | Input rail (2.3–5.5 V); benefits from local 1 µF ceramic decoupling close to pin |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low dropout | 60 mV at 200 mA enables single-cell Li-ion (3.0–4.2 V) or dual-cell alkaline operation without headroom loss |
| Low-noise regulation | 30 µV RMS noise supports sensitive RF front-ends and high-resolution data converters |
| Active pull-down on disable | 100 Ω internal switch discharges output rapidly, preventing latch-up or false wake-up in system sleep modes |
| Fast startup | 200 µs to reach 95% of 3.3 V output allows responsive power sequencing in portable devices |
| Robust thermal protection | 160 °C shutdown with 20 K hysteresis prevents permanent damage during sustained overload or poor heatsinking |
Applications
| Mobile Phone Baseband Power | Portable Media Player Audio Bias |
|---|---|
Use Scenario: Supplying clean 3.3 V bias to baseband processor I/O banks and memory interfaces in space-constrained smartphone PCBs. IC Role / Device Role / Timing Role: Primary low-noise LDO delivering regulated 3.3 V rail with fast transient response to dynamic processor load changes. Use Value: 60 mV dropout preserves battery runtime; 30 µV noise prevents digital crosstalk into sensitive analog sections. | Use Scenario: Powering DAC, headphone amplifier, and codec analog sections in battery-operated MP3 players and Bluetooth earbuds. IC Role / Device Role / Timing Role: Low-noise post-regulator for audio signal chain, enabled only during playback to minimize quiescent drain. Use Value: 1.0 µA shutdown current extends idle battery life; 55 dB PSRR rejects switching noise from main system DC-DC. |
| Wireless Headset Sensor Subsystem | IoT Edge Node Real-Time Clock |
Use Scenario: Providing stable 3.3 V to MEMS motion sensors and BLE radio transceivers in compact wearable form factors. IC Role / Device Role / Timing Role: Always-on LDO with controlled enable sequencing, using EN pin to synchronize sensor activation with radio transmit windows. Use Value: 200 µs startup enables precise power gating; 100 Ω pull-down prevents sensor output floating during BLE sleep intervals. | Use Scenario: Supplying backup-battery-isolated 3.3 V rail to RTC and SRAM in industrial IoT gateways with long-term offline operation. IC Role / Device Role / Timing Role: Low-quiescent LDO maintaining timekeeping accuracy during main power loss, with thermal watchdog ensuring reliability. Use Value: 0.1 µA shutdown current minimizes battery depletion; 125 °C junction limit supports extended outdoor deployment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS7A0533PDBVR | 300 mA rating, 170 mV dropout at 200 mA, 25 µV noise, SOT-23-5 package | Larger footprint and higher dropout reduce suitability for ultra-thin mobile designs with tight VIN margin | Preferred where higher output current or legacy SMT placement infrastructure exists |
| MCP1700-3302E/TO | 250 mA rating, 175 mV dropout at 250 mA, 30 µV noise, TO-92 through-hole package | Through-hole mounting and larger thermal resistance (220 K/W) limit use in high-density portable PCBs | Suitable for cost-sensitive industrial controls where board space and thermal constraints are less critical |
Compared with TPS7A0533PDBVR and MCP1700-3302E/TO, LD6806CX4/C33P,315 delivers superior dropout performance in a 0.76 mm × 0.76 mm WLCSP, enabling direct integration into next-gen mobile modules where board area and battery efficiency are paramount.
Availability
LD6806CX4/C33P,315 is available at Aetrix Electronics and suitable for mobile handset power management, portable audio biasing, wireless sensor subsystems, and IoT real-time clock applications requiring stable component supply and long-term lifecycle assurance.
Supply support for LD6806CX4/C33P,315 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer electronics.
The LD6806 series belongs to NXP's ultra-low-noise, miniaturized LDO portfolio, engineered specifically for space-constrained portable devices demanding high PSRR, fast transient response, and robust thermal protection in sub-1 mm² packages.
FAQ
What is the nominal output voltage and tolerance of LD6806CX4/C33P,315?
The LD6806CX4/C33P,315 is factory-set to deliver 3.3 V nominal output voltage with ±2% tolerance over −30 °C to +85 °C ambient temperature. This specification is guaranteed per Table 10 of the Rev. 3 datasheet and applies under 1 mA to 200 mA load conditions with recommended 1.0 µF X7R output capacitance.
Does LD6806CX4/C33P,315 include an internal pull-down resistor on the OUT pin?
Yes, LD6806CX4/C33P,315 incorporates an internal 100 Ω pull-down transistor activated when the EN pin is driven LOW. This feature ensures rapid discharge of the output node during disable, preventing floating voltages that could cause unintended wake-up or latch-up in downstream circuitry.
What is the maximum input voltage rating for LD6806CX4/C33P,315?
The absolute maximum input voltage for LD6806CX4/C33P,315 is +6.0 V for transient events up to 4 ms, as specified in Table 7 of the datasheet. For continuous operation, the recommended input range is 2.3 V to 5.5 V - exceeding this may trigger thermal shutdown or degrade long-term reliability.
Can LD6806CX4/C33P,315 be used with ceramic capacitors smaller than 1.0 µF?
No - the minimum recommended external output capacitance for LD6806CX4/C33P,315 is 1.0 µF (X7R dielectric), with ESR between 5 mΩ and 500 mΩ. Using lower capacitance risks instability, overshoot, or failure to meet startup/shutdown timing specifications per Section 10.1 and Table 11 of the datasheet.
What package type and dimensions does LD6806CX4/C33P,315 use?
LD6806CX4/C33P,315 uses the WLCSP4 package with backside coating (per Table 4 and Figure 36), measuring 0.76 mm × 0.76 mm × 0.51 mm (typical height), 0.4 mm bump pitch, and 2×2 bump array. Its solder footprint requires 0.25 mm pad diameter and 0.4 mm center-to-center spacing per Figure 39 and Table 14.
LD6806CX4/C33P,315 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- LD6806
- Package/Case:
- 4-XFBGA, WLCSP
- Packaging:
- Bulk
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.1V @ 200mA
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 100 µA
- Current - Supply (Max):
- 250 µA
- PSRR:
- 55dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 4-WLCSP (0.76x0.76)
LD6806CX4/C33P,315 FAQ
1.How can I place an order for LD6806CX4/C33P,315 through Aetrix?
Please submit a Request for Quotation (RFQ) for LD6806CX4/C33P,315 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD6806CX4/C33P,315 reliable?
The price and inventory of LD6806CX4/C33P,315 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD6806CX4/C33P,315 is usually 5 days.
3.What payment methods are accepted for LD6806CX4/C33P,315?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LD6806CX4/C33P,315 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LD6806CX4/C33P,315?
LD6806CX4/C33P,315 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LD6806CX4/C33P,315 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LD6806CX4/C33P,315?
For technical support, including LD6806CX4/C33P,315 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD6806CX4/C33P,315 requirements.
6.How does Aetrix verify that LD6806CX4/C33P,315 is sourced from the original manufacturer or authorized distributors?
All LD6806CX4/C33P,315 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD6806CX4/C33P,315 meets industry standards.
7.What is the process for return or replacement of LD6806CX4/C33P,315?
All LD6806CX4/C33P,315 units undergo pre-shipment inspection (PSI). If there is an issue with LD6806CX4/C33P,315, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD6806CX4/C33P,315 part is unused and in its original packaging.
Return procedure for LD6806CX4/C33P,315:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LD6806CX4/C33P,315 Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

