NXP Semiconductors LD6806F/20P,115
- Part No.:
- LD6806F/20P,115
- Manufacturer:
- NXP Semiconductors
- Package:
- 6-XFDFN
- Datasheet:
-
LD6806F/20P,115.pdf
- Description:
- IC REG LINEAR 2V 200MA 6XSON
- Quantity:
- Payment:

- Shipping:

Inventory:5,000
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Product details
Overview
LD6806F/20P,115 from NXP Semiconductors is a 2.0 V fixed-output, low-noise, ultra-low-dropout linear regulator in SOT886 (XSON6) package, delivering up to 200 mA with 80 mV dropout at full load, 30 µV RMS output noise (10 Hz–100 kHz), and 200 µs startup time. It features active-HIGH enable, thermal shutdown, overcurrent protection, and a pull-down transistor for low-ohmic output during disable-ideal for power-sensitive mobile handset baseband ICs and camera modules.
For engineers reviewing the LD6806F/20P,115 datasheet, LD6806F/20P,115 pinout, LD6806F/20P,115 application, or LD6806F/20P,115 equivalent, key selection criteria include its 2.0 V fixed output, SOT886 thermal resistance (220 K/W), 55 dB PSRR at 1 kHz, shutdown quiescent current of 0.1–1.0 µA, and compatibility with 1 µF X7R ceramic output capacitors.
Technical Context
The LD6806F/20P,115 implements a PMOS pass transistor architecture enabling ultra-low dropout voltage and stable operation with minimal external capacitance. Its internal bandgap reference, error amplifier, and thermal watchdog operate across −40 °C to +85 °C ambient, supporting fast transient response and robust load regulation (0.005 %/mA typical).
Unlike the H-suffix variants, the P-suffix enables active pull-down via an integrated NMOS switch at the OUT pin during disable, ensuring rapid discharge of downstream capacitance without external components. The device's ESD rating (10 kV HBM) and Pb-free, halogen-free construction meet stringent mobile platform reliability requirements.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltage | Fixed 2.0 V ±2 % over −40 °C to +85 °C; supports precision analog rail generation without external feedback. |
| Dropout voltage | 80 mV typical at 200 mA; enables efficient operation from 2.2 V input, critical for single-cell Li-ion or Li-poly battery systems. |
| PSRR | 55 dB at 1 kHz; suppresses switching noise from upstream DC-DC converters feeding sensitive RF or audio circuitry. |
| Output noise | 30 µV RMS (10 Hz–100 kHz); ensures clean supply for low-noise ADCs, PLLs, and RF front-ends. |
| Quiescent current | 155–250 µA under load; 0.1–1.0 µA in shutdown; extends battery life in always-on sensor or standby subsystems. |
| Enable threshold | VIH = 1.4 V min, VIL = 0.4 V max; compatible with 1.8 V and 3.3 V logic-level microcontrollers without level-shifting. |
| Thermal shutdown | Triggers at 160 °C junction temperature with 20 K hysteresis; prevents permanent damage during sustained overload or poor PCB heatsinking. |
Pinout & Package
SOT886 (XSON6) plastic extremely thin small outline package, no leads, 6 terminals, body size 1.0 mm × 1.45 mm × 0.5 mm, exposed pad not electrically connected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | OUT | Regulated 2.0 V output; includes integrated pull-down NMOS for rapid discharge when disabled. |
| 2 | n.c. | No internal connection; must be left floating or grounded per layout best practice-no electrical function. |
| 3 | GND | Power ground reference; requires low-inductance connection to PCB ground plane for noise and thermal performance. |
| 4 | EN | Active-HIGH enable input; drives internal regulator core; 1.4 V min threshold ensures compatibility with 1.8 V I/O domains. |
| 5 | n.c. | No internal connection; must be left floating or grounded-no electrical function. |
| 6 | IN | Input supply (2.3–5.5 V); requires local 1 µF ceramic decoupling capacitor placed within 2 mm of pin. |
Key Features
| Feature | Design Value |
|---|---|
| Pull-down output stage | Integrated 100 Ω NMOS switch discharges output capacitance rapidly upon disable-eliminates need for external bleed resistor. |
| Low-noise regulation | 30 µV RMS output noise enables direct powering of RF transceivers and high-resolution ADCs without additional filtering. |
| Fast startup | 200 µs to reach 95 % of 2.0 V output allows tight power sequencing in multi-rail mobile SoC subsystems. |
| Robust protection | Thermal shutdown (160 °C), overcurrent limiting (~600 mA short-circuit), and 10 kV HBM ESD ensure field reliability in handheld environments. |
| Miniaturized footprint | SOT886 package (1.0 × 1.45 mm) reduces board area by >50 % vs. traditional SOT23-5, supporting ultra-thin mobile form factors. |
Applications
| Mobile Baseband Power | Camera Module Core Supply |
|---|---|
Use Scenario: Powering baseband processor I/O and memory interface rails in LTE smartphones where input voltage varies from 2.8 V (battery sag) to 4.2 V (full charge). IC Role / Device Role / Timing Role: Primary LDO delivering stable 2.0 V to high-speed SerDes and DDR I/O buffers requiring low noise and fast transient response. Use Value: 80 mV dropout preserves headroom at low battery voltage; 55 dB PSRR rejects ripple from buck converter supplying the same SoC domain. | Use Scenario: Supplying image signal processor (ISP) core logic and CIS analog front-end in dual-camera smartphone modules. IC Role / Device Role / Timing Role: Low-noise 2.0 V regulator for ISP digital core and CIS analog bias, synchronized to frame capture timing via EN pin control. Use Value: 30 µV RMS noise prevents image fixed-pattern noise; 200 µs startup aligns with camera boot sequence; pull-down ensures clean reset between frames. |
| Wearable Sensor Hub | Bluetooth LE Audio Codec |
Use Scenario: Providing regulated 2.0 V to ultra-low-power inertial measurement unit (IMU) and environmental sensor fusion MCU in smartwatch applications. IC Role / Device Role / Timing Role: Always-on LDO with sub-1 µA shutdown current, enabled only during sensor readout bursts via host MCU GPIO. Use Value: 0.1 µA shutdown current extends coin-cell battery life to >12 months; SOT886 footprint fits constrained wearable PCB real estate. | Use Scenario: Powering Bluetooth LE audio codec ICs in true wireless stereo (TWS) earbuds where space and thermal dissipation are severely limited. IC Role / Device Role / Timing Role: Secondary LDO generating clean 2.0 V for DAC and analog filter stages, enabled synchronously with audio playback start. Use Value: 220 K/W thermal resistance allows safe 200 mA operation on 2-layer FR4; 30 µV noise prevents audible hiss in high-SNR audio paths. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6219B202MR-G | 2.0 V fixed, SOT-25, 150 mA, 120 mV dropout, no enable pin, no pull-down | Lacks EN control and active discharge; unsuitable for sequenced or fast-discharge systems | Select only if enable functionality and output discharge are unnecessary and board space permits larger SOT-25 footprint. |
| Richtek RT9013-20GB | 2.0 V fixed, SOT-25, 300 mA, 250 mV dropout, active-HIGH EN, no pull-down | Higher dropout limits use below 2.25 V input; lacks integrated pull-down for rapid discharge | Preferable for higher-current loads but requires external discharge path; verify PSRR (45 dB @ 1 kHz) meets noise budget. |
Compared with XC6219B202MR-G and RT9013-20GB, LD6806F/20P,115 uniquely combines 200 mA capability, 80 mV dropout, integrated pull-down, and SOT886 miniaturization-making it optimal for space-constrained, sequenced, and noise-sensitive mobile subsystems where fast, controlled power cycling is required.
Availability
LD6806F/20P,115 is available at Aetrix Electronics and suitable for mobile handset power management, camera module regulation, and wearable sensor hub applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for LD6806F/20P,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and mobile markets.
The LD6806 series belongs to NXP's ultra-low-noise, miniaturized LDO portfolio, designed specifically for power integrity in space-constrained portable electronics-emphasizing low dropout, fast transient response, and integrated protection for battery-powered SoC subsystems.
FAQ
What is the nominal output voltage of LD6806F/20P,115?
The LD6806F/20P,115 delivers a fixed nominal output voltage of 2.0 V, with guaranteed tolerance of ±2 % over the full operating temperature range (−40 °C to +85 °C) and load conditions (1 mA to 200 mA). This value is laser-trimmed during manufacturing and does not require external resistive feedback.
Does LD6806F/20P,115 include an enable pin, and what are its logic thresholds?
Yes, LD6806F/20P,115 includes an active-HIGH enable (EN) pin (Pin 4). Its logic thresholds are VIL ≤ 0.4 V (LOW) and VIH ≥ 1.4 V (HIGH), making it directly compatible with 1.8 V CMOS I/O without level translation. The EN pin controls both regulator activation and the integrated pull-down transistor.
What package type is used for LD6806F/20P,115, and what are its key mechanical dimensions?
LD6806F/20P,115 uses the SOT886 (XSON6) package: a leadless, 6-terminal, extremely thin small outline package measuring 1.0 mm × 1.45 mm × 0.5 mm. It features gull-wing–like terminations on the bottom surface and requires reflow soldering-wave soldering is not recommended.
How does the pull-down feature of LD6806F/20P,115 function, and what is its design impact?
The LD6806F/20P,115 integrates a 100 Ω NMOS pull-down transistor between OUT and GND, activated automatically when EN is LOW. This discharges external output capacitance rapidly (tsd(reg) ≈ 300 µs), eliminating hold-up voltage and enabling precise power sequencing-critical for multi-rail SoCs and camera modules.
What is the recommended output capacitor for stable operation of LD6806F/20P,115?
The LD6806F/20P,115 requires a minimum 1.0 µF X7R ceramic capacitor at the OUT pin, placed within 2 mm of the device. The capacitor must have ESR between 5 mΩ and 500 mΩ. A 1.0 µF, 0603, 10 V X7R part with <100 mΩ ESR is commonly used and ensures stability across −40 °C to +125 °C junction temperature.
LD6806F/20P,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 6-XFDFN
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 2V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.13V @ 200mA
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 100 µA
- Current - Supply (Max):
- 250 µA
- PSRR:
- 55dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON, SOT886 (1.45x1)
LD6806F/20P,115 FAQ
1.How can I place an order for LD6806F/20P,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for LD6806F/20P,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD6806F/20P,115 reliable?
The price and inventory of LD6806F/20P,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD6806F/20P,115 is usually 5 days.
3.What payment methods are accepted for LD6806F/20P,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LD6806F/20P,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LD6806F/20P,115?
LD6806F/20P,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LD6806F/20P,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LD6806F/20P,115?
For technical support, including LD6806F/20P,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD6806F/20P,115 requirements.
6.How does Aetrix verify that LD6806F/20P,115 is sourced from the original manufacturer or authorized distributors?
All LD6806F/20P,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD6806F/20P,115 meets industry standards.
7.What is the process for return or replacement of LD6806F/20P,115?
All LD6806F/20P,115 units undergo pre-shipment inspection (PSI). If there is an issue with LD6806F/20P,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD6806F/20P,115 part is unused and in its original packaging.
Return procedure for LD6806F/20P,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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