NXP Semiconductors LD6806TD/13P,125

Overview

LD6806TD/13P,125 from NXP Semiconductors is a 1.3 V, 200 mA ultra-low-dropout linear regulator in SOT753 (TSOP5) package with 80 mV typical dropout at full load, 30 µV_RMS output noise (10 Hz–100 kHz), and active-HIGH enable pin. It operates from 2.3 V to 5.5 V input and features low-ohmic pull-down output during disable-enabling fast discharge in portable power rails for mobile phone baseband ICs and PMIC subsystems.

For engineers reviewing the LD6806TD/13P,125 datasheet, LD6806TD/13P,125 pinout, LD6806TD/13P,125 application, or LD6806TD/13P,125 equivalent, key selection criteria include its 1.3 V fixed output, thermal shutdown (160 °C), ±3 % output voltage accuracy over temperature, 55 dB PSRR at 1 kHz, and compatibility with 1 µF X7R ceramic output capacitors in space-constrained handheld designs.

Technical Context

The LD6806TD/13P,125 uses a monolithic silicon LDO architecture with internal reference generator, current-limit protection, and thermal watchdog circuitry. Its pass transistor is optimized for low dropout and low-noise operation, with integrated ESD protection rated at ±10 kV HBM.

Unlike the H-suffix variants, the P-suffix enables a dedicated low-ohmic pull-down transistor (R_pd = 100 Ω typ.) at the output pin during disable, ensuring rapid discharge of downstream capacitance without external components-critical for sequencing-sensitive SoC power domains.

Key Specifications

Pinout & Package

SOT753 (TSOP5) plastic surface-mounted package: 5-lead gull-wing, 2.7 mm × 3.1 mm × 1.1 mm body, 0.95 mm lead pitch, RoHS-compliant and halogen-free.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with TPS7A0513PDQNR and MCP1703T-1302E/MB, LD6806TD/13P,125 uniquely combines 1.3 V regulation, 80 mV dropout, integrated pull-down, and SOT753 packaging-making it optimal for compact, sequenced, low-noise portable power rails where discharge control and space efficiency are critical.

Availability

LD6806TD/13P,125 is available at Aetrix Electronics and suitable for mobile handset power management, wearable sensor hub supplies, portable audio codec biasing, and IoT edge node PMIC sub-rails requiring stable component supply across production lifecycles.

Supply support for LD6806TD/13P,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.

The LD6806 series belongs to NXP's ultra-low-noise, miniaturized LDO portfolio-designed specifically for space-constrained, battery-powered portable electronics requiring precise, low-dropout, and fast-discharge voltage regulation.

FAQ

What is the nominal output voltage and tolerance of LD6806TD/13P,125?

The LD6806TD/13P,125 delivers a fixed 1.3 V output with ±3 % accuracy over the full operating temperature range (−40 °C to +85 °C). This tolerance is guaranteed under 1 mA to 200 mA load conditions and accounts for line, load, and temperature variation per NXP's Product Data Sheet Rev. 3. The "13" in the part number explicitly denotes the 1.3 V variant within the LD6806 family.

Does LD6806TD/13P,125 include an internal pull-down transistor, and how does it function?

Yes, LD6806TD/13P,125 includes an integrated low-ohmic pull-down transistor activated when the EN pin is driven LOW (<0.4 V). This provides a 100 Ω typical path from OUT to GND, discharging downstream capacitance in under 300 µs. This feature eliminates external discharge resistors and ensures safe, controlled power-down in sequenced systems-distinct from the high-ohmic H-suffix variants.

What is the minimum recommended output capacitor for stable operation of LD6806TD/13P,125?

The LD6806TD/13P,125 requires a minimum 1.0 µF X7R ceramic capacitor at the OUT pin for guaranteed stability across temperature and process variation. NXP specifies ±30 % capacitance tolerance and 5–500 mΩ ESR range. Using a 1.0 µF, 0805 X7R capacitor with ~100 mΩ ESR meets all stability criteria and supports the specified 200 µs start-up time.

Can LD6806TD/13P,125 operate from a single-cell Li-ion battery?

Yes, LD6806TD/13P,125 supports input voltages from 2.3 V to 5.5 V, making it compatible with discharged single-cell Li-ion (2.7–4.2 V) and Li-polymer batteries. With only 80 mV typical dropout at 200 mA, it regulates 1.3 V down to an input of 1.38 V-enabling extended runtime even as the battery voltage declines below 2.0 V in backup or low-power modes.

What protection features are integrated into LD6806TD/13P,125?

LD6806TD/13P,125 integrates thermal shutdown (160 °C with 20 K hysteresis), overcurrent limiting (~600 mA short-circuit current), and ±10 kV Human Body Model ESD protection on all pins. These protections operate autonomously without external components, safeguarding both the regulator and downstream circuitry during fault conditions such as PCB shorts, thermal overload, or handling-induced ESD events.