NXP Semiconductors LD6806TD/18P,125
- Part No.:
- LD6806TD/18P,125
- Manufacturer:
- NXP Semiconductors
- Package:
- SC-74A, SOT-753
- Datasheet:
-
LD6806TD/18P,125.pdf
- Description:
- IC REG LINEAR 1.8V 200MA 5TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,287
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Product details
Overview
LD6806TD/18P,125 from NXP Semiconductors is a 1.8 V, 200 mA ultra-low-dropout linear regulator in SOT753 (TSOP5) package, featuring 80 mV typical dropout at full load, 30 µV RMS output noise (10 Hz–100 kHz), and active-HIGH enable with 1.4 V VIH threshold. It delivers stable low-noise power for RF and analog circuitry in space-constrained mobile handsets and portable media players.
For engineers reviewing the LD6806TD/18P,125 datasheet, LD6806TD/18P,125 pinout, LD6806TD/18P,125 application, or LD6806TD/18P,125 equivalent, key selection criteria include its low-ohmic pull-down output stage during disable, thermal shutdown at 160 °C, ±0.5 % output voltage accuracy at +25 °C, and compatibility with 1.0 µF X7R ceramic output capacitors.
Technical Context
The LD6806TD/18P,125 integrates a PMOS pass transistor with internal voltage reference, current limiting, and thermal protection circuitry. Its low-ohmic output stage (100 Ω pull-down resistance) ensures rapid discharge of output capacitance upon disable, supporting clean power sequencing in multi-rail systems.
Designed for battery-powered applications, it operates across 2.3 V to 5.5 V input and maintains regulation down to 1.8 V output with <0.02 %/mA load regulation error. PSRR reaches −55 dB at 1 kHz, and startup time is specified at ≤200 µs into a 200 mA load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | 1.8 V nominal, ±0.5 % tolerance at +25 °C - ensures precise biasing for 1.8 V I/O domains and core logic. |
| Dropout Voltage | 80 mV typical at 200 mA - enables operation with minimal headroom (e.g., 1.88 V input sustains 1.8 V output). |
| Quiescent Current | 155 µA typical at 200 mA load - minimizes standby power loss in always-on subsystems. |
| Output Noise | 30 µV RMS (10 Hz–100 kHz) - supports noise-sensitive analog circuits like ADC references and RF synthesizers. |
| PSRR | −55 dB at 1 kHz - suppresses switching noise from upstream DC-DC converters feeding the LDO input. |
| Enable Threshold | VIH = 1.4 V min, VIL = 0.4 V max - compatible with 1.8 V and 3.3 V GPIO logic without level shifting. |
| Thermal Shutdown | 160 °C junction temperature with 20 K hysteresis - prevents permanent damage during sustained overload or poor PCB thermal design. |
Pinout & Package
SOT753 (TSOP5) plastic surface-mounted package: 5-lead gull-wing, 2.7 mm × 3.1 mm × 1.3 mm body, 0.95 mm lead pitch, RoHS-compliant and halogen-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN) | Supply voltage input | Accepts 2.3 V–5.5 V input; requires local 1 µF ceramic decoupling capacitor for stability. |
| 2 (GND) | Supply ground | Primary return path for input and output currents; must connect to low-impedance ground plane. |
| 3 (EN) | Device enable input (active HIGH) | Drives internal regulator when ≥1.4 V applied; pulls output low via 100 Ω switch when disabled. |
| 4 (n.c.) | Not connected | No internal connection; must remain unconnected on PCB to avoid parasitic coupling or mechanical stress. |
| 5 (OUT) | Regulator output voltage | Delivers regulated 1.8 V; requires 1.0 µF X7R ceramic capacitor with ESR 5–500 mΩ for loop stability. |
Key Features
| Feature | Design Value |
|---|---|
| Low-ohmic output stage on disable | 100 Ω pull-down resistance ensures fast output discharge (<300 µs), enabling safe power sequencing in multi-voltage systems. |
| Ultra-low noise performance | 30 µV RMS output noise over 10 Hz–100 kHz supports high-resolution analog signal chains without additional filtering. |
| Fast start-up time | ≤200 µs to reach 95 % of 1.8 V output under 200 mA load - critical for responsive power management in wake-from-sleep scenarios. |
| Integrated ESD protection | 10 kV HBM rating on all pins eliminates need for external TVS diodes in handheld device designs. |
| Thermal and overcurrent protection | Auto-recovery shutdown at 160 °C junction temperature and current limiting prevent latch-up or catastrophic failure during fault conditions. |
Applications
| Mobile Phone Baseband Power | Portable Media Player Audio Codec Supply |
|---|---|
|
Use Scenario: Powering 1.8 V digital baseband processor cores and I/O interfaces in GSM/UMTS smartphones with tight board area constraints. IC Role / Device Role / Timing Role: Primary low-noise, low-dropout post-regulator delivering stable 1.8 V from a shared 3.3 V system rail. Use Value: Enables reliable operation at minimum input voltage (2.3 V), extends battery runtime, and avoids noise coupling into sensitive RF sections. |
Use Scenario: Supplying analog and digital sections of stereo audio codecs in MP3 players and Bluetooth headphones. IC Role / Device Role / Timing Role: Dedicated low-noise LDO for DAC reference and headphone amplifier bias rails. Use Value: 30 µV RMS noise ensures >95 dB SNR in audio playback; fast enable/disable supports dynamic power gating during pause/play transitions. |
| Wearable Sensor Hub Power | IoT Edge Node Microcontroller Core Supply |
|
Use Scenario: Providing regulated 1.8 V to MEMS sensor fusion hubs (accelerometer, gyroscope, magnetometer) in smartwatches. IC Role / Device Role / Timing Role: Low-quiescent-current LDO powering always-on sensor interface logic and FIFO buffers. Use Value: 155 µA operating IQ and 1.0 µA shutdown current maximize coin-cell battery life; thermal protection guards against enclosure overheating. |
Use Scenario: Supplying 1.8 V core voltage to ARM Cortex-M0+ microcontrollers in battery-operated IoT nodes with BLE connectivity. IC Role / Device Role / Timing Role: Main system LDO with enable control synchronized to MCU sleep/wake cycles. Use Value: 200 µs startup time meets sub-millisecond wake latency requirements; 100 Ω pull-down prevents floating states during deep-sleep mode. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP1700-1802E/TO | 1.8 V fixed output, 250 mA, 175 mV dropout at 250 mA, SOT23-5 package, no enable pin. | Lacks active-HIGH enable and pull-down output; unsuitable for power sequencing or fast discharge requirements. | Select only if enable control and output discharge are unnecessary and higher dropout is acceptable. |
| Torex XC6206P182MR-G | 1.8 V fixed output, 250 mA, 160 mV dropout at 250 mA, SOT23-5, active-HIGH enable, no integrated pull-down. | Provides enable but no low-ohmic discharge path; requires external pulldown resistor for controlled shutdown. | Choose when board space allows discrete discharge components and thermal protection is less critical. |
Compared with MCP1700-1802E/TO and XC6206P182MR-G, the LD6806TD/18P,125 uniquely combines 1.8 V regulation, 80 mV dropout, integrated 100 Ω pull-down, and 160 °C thermal shutdown in a compact SOT753 package-making it optimal for space- and sequencing-sensitive portable electronics.
Availability
LD6806TD/18P,125 is available at Aetrix Electronics and suitable for mobile handset power management, portable audio subsystems, wearable sensor hubs, and IoT edge node designs requiring stable component supply and long-term manufacturability.
Supply support for LD6806TD/18P,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.
The LD6806 series was designed specifically for miniaturized portable electronics, emphasizing ultra-low dropout, low noise, and robust thermal behavior in wafer-level and small-outline packages.
FAQ
What is the maximum input voltage rating for LD6806TD/18P,125?
The LD6806TD/18P,125 supports an absolute maximum input voltage of +6.0 V for transient events up to 4 ms, with recommended continuous operation between 2.3 V and 5.5 V. Exceeding 6.0 V risks permanent damage, and operation below 2.3 V prevents regulation at 1.8 V output due to dropout constraints.
Does LD6806TD/18P,125 require an external output capacitor, and what type is recommended?
Yes, LD6806TD/18P,125 requires a minimum 1.0 µF X7R ceramic capacitor on the OUT pin for stability, with ESR between 5 mΩ and 500 mΩ. The datasheet specifies ±30 % tolerance over −40 °C to +125 °C, and recommends avoiding NP0/C0G for this application due to insufficient capacitance retention at temperature extremes.
How does the pull-down function operate in LD6806TD/18P,125 during disable?
When the EN pin voltage falls below 0.4 V, LD6806TD/18P,125 activates an internal 100 Ω NMOS switch between OUT and GND, discharging external output capacitance within 300 µs. This prevents floating outputs and ensures deterministic state transitions in multi-rail power systems.
What is the thermal resistance (Rth(j-a)) of LD6806TD/18P,125 in its SOT753 package?
The LD6806TD/18P,125 has a typical junction-to-ambient thermal resistance of 125 K/W under standard test conditions (two-layer PCB, 25 °C ambient). Actual performance depends on copper pour area, via count, and layer stack; reducing Rth(j-a) below 80 K/W requires dedicated thermal pads and multiple thermal vias to inner ground planes.
Is LD6806TD/18P,125 compatible with lead-free reflow soldering processes?
Yes, LD6806TD/18P,125 is RoHS-compliant and qualified for lead-free reflow per J-STD-020C. Its SOT753 package falls in the <350 mm³ volume category, requiring a peak reflow temperature of 260 °C. Moisture sensitivity level (MSL) is 1 - no bake required before assembly if sealed packaging remains unopened.
LD6806TD/18P,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.8V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.13V @ 200mA
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 100 µA
- Current - Supply (Max):
- 250 µA
- PSRR:
- 55dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSOP
LD6806TD/18P,125 FAQ
1.How can I place an order for LD6806TD/18P,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for LD6806TD/18P,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD6806TD/18P,125 reliable?
The price and inventory of LD6806TD/18P,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD6806TD/18P,125 is usually 5 days.
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LD6806TD/18P,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LD6806TD/18P,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LD6806TD/18P,125?
For technical support, including LD6806TD/18P,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD6806TD/18P,125 requirements.
6.How does Aetrix verify that LD6806TD/18P,125 is sourced from the original manufacturer or authorized distributors?
All LD6806TD/18P,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD6806TD/18P,125 meets industry standards.
7.What is the process for return or replacement of LD6806TD/18P,125?
All LD6806TD/18P,125 units undergo pre-shipment inspection (PSI). If there is an issue with LD6806TD/18P,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD6806TD/18P,125 part is unused and in its original packaging.
Return procedure for LD6806TD/18P,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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