NXP Semiconductors LD6806TD/23P,125
- Part No.:
- LD6806TD/23P,125
- Manufacturer:
- NXP Semiconductors
- Package:
- SC-74A, SOT-753
- Datasheet:
-
LD6806TD/23P,125.pdf
- Description:
- IC REG LINEAR 2.3V 200MA 5TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:27,000
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Product details
Overview
LD6806TD/23P,125 from NXP Semiconductors is a 2.3 V fixed-output, 200 mA ultra-low-dropout linear regulator in SOT753 (TSOP5) package, featuring 80 mV typical dropout at full load, 30 µVRMS output noise (10 Hz–100 kHz), and active-HIGH enable with 1.4 V logic threshold-designed for power rail stabilization in mobile phone baseband ICs and RF front-end modules.
For engineers reviewing the LD6806TD/23P,125 datasheet, LD6806TD/23P,125 pinout, LD6806TD/23P,125 application, or LD6806TD/23P,125 equivalent, key selection criteria include its low-noise performance, thermal shutdown hysteresis (20 K), pull-down output stage during disable (Rpd = 100 Ω), PSRR of −55 dB at 1 kHz, and compatibility with 1 µF X7R ceramic output capacitors.
Technical Context
The LD6806TD/23P,125 implements a PMOS pass transistor architecture enabling ultra-low dropout operation, with internal voltage reference, error amplifier, and current-limit protection integrated in monolithic silicon. Its enable input directly controls the pass device gate via internal level-shifting circuitry, independent of input supply voltage.
Thermal protection activates at 160 °C junction temperature with 20 K hysteresis, and overcurrent limiting engages at 300 mA peak output current. The device maintains regulation across −40 °C to +85 °C ambient, with 125 K/W junction-to-ambient thermal resistance in SOT753 package.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltage | Fixed 2.3 V ±3% over −40 °C to +85 °C; enables direct powering of 2.3 V I/O rails without external feedback. |
| Dropout voltage | 80 mV typical at 200 mA load; allows operation with VIN as low as 2.38 V while sustaining regulated 2.3 V output. |
| PSRR | −55 dB at 1 kHz; suppresses switching noise from upstream DC-DC converters feeding the LDO input. |
| Output noise | 30 µVRMS (10 Hz–100 kHz); suitable for noise-sensitive analog circuits like ADC references and RF synthesizers. |
| Enable threshold | VIH = 1.4 V min; compatible with 1.8 V and 3.3 V GPIOs without level-shifting. |
| Quiescent current | 155 µA typical at 200 mA load; balances low-noise performance with efficiency in always-on subsystems. |
| Shutdown current | 0.1 µA typical; reduces system standby power in battery-powered devices. |
Pinout & Package
SOT753 (TSOP5) plastic surface-mounted package: 5-lead gull-wing, 0.95 mm pitch, body size 2.9 × 1.5 × 1.1 mm, RoHS-compliant and halogen-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN) | Input supply voltage | Accepts 2.3 V to 5.5 V; requires local 1 µF ceramic decoupling capacitor per layout guidelines. |
| 2 (GND) | Ground reference | Low-impedance return path for regulator and load; must connect to solid ground plane. |
| 3 (EN) | Enable control input | Active-HIGH logic; pulls up internally to VIN; drives high-impedance state when floating. |
| 4 (n.c.) | No connection | Internally unconnected; PCB pad may be omitted or left unconnected per design rules. |
| 5 (OUT) | Regulated output | Delivers 2.3 V at up to 200 mA; includes integrated 100 Ω pull-down transistor when EN = LOW. |
Key Features
| Feature | Design Value |
|---|---|
| Low-ohmic output during disable | 100 Ω pull-down resistance actively discharges output capacitance, preventing floating rail in multi-rail systems. |
| Fast start-up time | 200 µs to reach 95% of 2.3 V output; supports rapid power sequencing in portable applications. |
| Integrated ESD protection | 10 kV HBM rating on all pins; eliminates need for external TVS diodes in handheld product designs. |
| Stable with small output capacitor | Guaranteed stability with 1.0 µF X7R ceramic capacitor; reduces board area vs. traditional LDOs requiring ≥10 µF. |
| Temperature watchdog | Thermal shutdown at 160 °C with 20 K hysteresis; prevents permanent damage during sustained overload or poor heatsinking. |
Applications
| Mobile Phone Baseband Power | RF Front-End Biasing |
|---|---|
Use Scenario: Supplying core voltage to application processors and modem ICs in slim smartphone designs where board space is constrained. IC Role / Device Role / Timing Role: Primary LDO delivering clean 2.3 V rail to digital baseband subsystems with tight voltage tolerance. Use Value: Ultra-low dropout enables longer battery runtime by extending usable cell voltage range down to 2.38 V input. | Use Scenario: Providing stable bias to power amplifiers and low-noise amplifiers in LTE/5G transceiver modules. IC Role / Device Role / Timing Role: Low-noise post-regulator cleaning switched-mode supply ripple before RF signal paths. Use Value: 30 µVRMS noise ensures minimal phase noise degradation in local oscillator chains. |
| Wearable Sensor Hub Supply | Industrial IoT Edge Node Core Rail |
Use Scenario: Powering MEMS motion sensors and ultra-low-power microcontrollers in compact fitness trackers. IC Role / Device Role / Timing Role: Always-on LDO maintaining real-time clock and sensor interface voltage during deep-sleep modes. Use Value: 0.1 µA shutdown current minimizes quiescent drain on coin-cell batteries over multi-year deployments. | Use Scenario: Delivering regulated 2.3 V to industrial-grade MCU peripherals operating in extended temperature environments. IC Role / Device Role / Timing Role: Robust point-of-load regulator supporting −40 °C to +85 °C ambient operation with thermal fault recovery. Use Value: 125 K/W thermal resistance and 20 K hysteresis enable reliable operation without external heatsinking in sealed enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS7A0523PDQNR | 200 mA, 2.3 V fixed, 170 mV dropout at 200 mA; 25 µVRMS noise; SOT-23-5 package | Larger dropout limits minimum input voltage to 2.47 V; lower noise but higher quiescent current (2.5 µA typical in shutdown) | Select when lower noise is critical and input headroom > 250 mV is available. |
| MCP1703T-2302E/MB | 250 mA, 2.3 V fixed, 600 mV dropout at 250 mA; 40 µVRMS noise; SOT-23-5 package | Higher dropout and noise; lacks pull-down output and thermal hysteresis; rated only to +125 °C junction | Select for cost-sensitive industrial applications where 2.3 V rail stability is less demanding. |
Compared with TPS7A0523PDQNR and MCP1703T-2302E/MB, LD6806TD/23P,125 delivers superior dropout performance (80 mV vs. ≥170 mV), integrated pull-down functionality for rail discharge, and tighter thermal protection hysteresis-making it optimal for space-constrained, battery-operated systems requiring fast sequencing and robust fault handling.
Availability
LD6806TD/23P,125 is available at Aetrix Electronics and suitable for mobile handset power management, wearable sensor hubs, and industrial IoT edge node designs requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for LD6806TD/23P,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.
The LD6806 series was developed to address miniaturization and low-noise demands in portable electronics, delivering ultra-low-dropout regulation with integrated enable control and thermal safety in wafer-level and leadless packages.
FAQ
What is the maximum input voltage rating for LD6806TD/23P,125?
The LD6806TD/23P,125 has an absolute maximum input voltage of +6.0 V for transient conditions up to 4 ms, with recommended continuous operation between 2.3 V and 5.5 V. Exceeding 6.0 V risks permanent damage to the internal PMOS pass transistor and reference circuitry, as specified in Table 7 of the NXP datasheet Rev. 3.
Does LD6806TD/23P,125 require an external output capacitor, and what value is recommended?
Yes, LD6806TD/23P,125 requires an external output capacitor for stability. The datasheet specifies a minimum of 1.0 µF X7R ceramic capacitor with ESR between 5 mΩ and 500 mΩ. Using 1.0 µF meets both stability and startup time requirements, and enables the guaranteed 200 µs turn-on performance.
How does the pull-down feature of LD6806TD/23P,125 function during disable?
When the EN pin is driven LOW (< 0.4 V), LD6806TD/23P,125 activates an internal 100 Ω NMOS pull-down transistor between OUT and GND. This actively discharges the output capacitor, preventing floating voltage on downstream circuits and ensuring predictable power-down behavior in multi-rail systems.
What is the thermal shutdown behavior of LD6806TD/23P,125?
LD6806TD/23P,125 disables regulation when junction temperature reaches 160 °C and remains off until temperature drops by 20 K (to ≤140 °C), at which point it automatically resumes operation. This hysteresis prevents thermal cycling and protects against sustained overload in poorly ventilated enclosures.
Is LD6806TD/23P,125 compatible with lead-free reflow soldering processes?
Yes, LD6806TD/23P,125 is RoHS-compliant and qualified for lead-free reflow soldering per J-STD-020C. Its SOT753 package falls under the < 350 mm³ volume category, requiring a peak reflow temperature of 260 °C, with full process guidance provided in NXP application notes AN10365 and AN10439.
LD6806TD/23P,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 2.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.13V @ 200mA
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 100 µA
- Current - Supply (Max):
- 250 µA
- PSRR:
- 55dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSOP
LD6806TD/23P,125 FAQ
1.How can I place an order for LD6806TD/23P,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for LD6806TD/23P,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD6806TD/23P,125 reliable?
The price and inventory of LD6806TD/23P,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD6806TD/23P,125 is usually 5 days.
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Once your LD6806TD/23P,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LD6806TD/23P,125?
For technical support, including LD6806TD/23P,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD6806TD/23P,125 requirements.
6.How does Aetrix verify that LD6806TD/23P,125 is sourced from the original manufacturer or authorized distributors?
All LD6806TD/23P,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD6806TD/23P,125 meets industry standards.
7.What is the process for return or replacement of LD6806TD/23P,125?
All LD6806TD/23P,125 units undergo pre-shipment inspection (PSI). If there is an issue with LD6806TD/23P,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD6806TD/23P,125 part is unused and in its original packaging.
Return procedure for LD6806TD/23P,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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