NXP Semiconductors LD6806TD/28H,125
- Part No.:
- LD6806TD/28H,125
- Manufacturer:
- NXP Semiconductors
- Package:
- SC-74A, SOT-753
- Datasheet:
-
LD6806TD/28H,125.pdf
- Description:
- IC REG LINEAR 2.8V 200MA 5TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,491
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Product details
Overview
LD6806TD/28H,125 from NXP Semiconductors is a 2.8 V fixed-output, high-ohmic-state ultra-low-dropout linear regulator in SOT753 (TSOP5) package, delivering 200 mA with 80 mV typical dropout at full load, 30 µV RMS output noise (10 Hz–100 kHz), and 55 dB PSRR at 1 kHz - optimized for space-constrained mobile power rails in handset baseband and RF subsystems.
For engineers reviewing the LD6806TD/28H,125 datasheet, LD6806TD/28H,125 pinout, LD6806TD/28H,125 application, or LD6806TD/28H,125 equivalent, key selection criteria include its 2.3–5.5 V input range, active-HIGH enable threshold (1.4 V min), thermal shutdown (160 °C), and high-impedance output disable state - critical for sequencing-sensitive low-power SoC domains.
Technical Context
The LD6806TD/28H,125 implements a PMOS pass transistor architecture enabling ultra-low dropout and fast 200 µs startup. Its internal reference generator feeds a precision error amplifier that regulates output against line/load variations while maintaining stability with ≥1 µF ceramic output capacitance.
Thermal protection triggers at 160 °C junction temperature with 20 K hysteresis, and overcurrent limiting caps peak output at 300 mA. The device operates across −40 °C to +85 °C ambient, with junction-to-ambient thermal resistance of 125 K/W in SOT753 packaging.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltage | Fixed 2.8 V ±2% over −30 °C to +85 °C; supports stable core supply for 2.8 V I/O interfaces. |
| Dropout voltage | 80 mV typical at 200 mA; enables operation with VIN as low as 2.88 V, maximizing battery runtime in single-cell Li-ion systems. |
| PSRR | −55 dB at 1 kHz; suppresses switching noise from upstream DC-DC converters feeding noisy power domains. |
| Output noise | 30 µV RMS (10 Hz–100 kHz); preserves signal integrity in analog front-ends and RF bias rails. |
| Enable threshold | VIH = 1.4 V min; compatible with 1.8 V and 3.3 V logic-level control without level-shifting. |
| Quiescent current | 70–100 µA operating; drops to 0.1–1.0 µA in shutdown - essential for always-on sensor nodes. |
| Thermal shutdown | 160 °C with 20 K hysteresis; prevents latch-up during transient overload or poor PCB heatsinking. |
Pinout & Package
SOT753 (TSOP5) plastic surface-mounted package: 3.0 mm × 2.5 mm × 1.1 mm body, gull-wing leads, RoHS-compliant, halogen-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 IN | Supply voltage input | Accepts 2.3–5.5 V input; requires local 1 µF ceramic decoupling for stability. |
| 2 GND | Supply ground | Low-impedance return path; must connect directly to PCB ground plane for thermal and noise performance. |
| 3 EN | Device enable input (active HIGH) | Logic-controlled on/off; pulls up to VIN or external 1.8 V/3.3 V rail; no external pull-up required. |
| 4 n.c. | Not connected | No internal connection; leave unconnected or tie to GND per layout best practice. |
| 5 OUT | Regulator output voltage | Delivers regulated 2.8 V; requires ≥1 µF X7R ceramic capacitor with ESR 5–500 mΩ for loop stability. |
Key Features
| Feature | Design Value |
|---|---|
| High-ohmic output disable | Outputs enter 3-state (high-Z) when EN = LOW - prevents backfeeding and enables safe power sequencing in multi-rail systems. |
| Ultra-low-noise regulation | 30 µV RMS noise ensures clean biasing for RF transceivers and high-resolution ADC references. |
| Fast 200 µs startup | Enables rapid wake-up from deep-sleep states in portable devices without compromising system responsiveness. |
| Integrated ESD protection | 10 kV HBM rating eliminates need for external TVS diodes on IN/OUT pins in handheld designs. |
| Thermal & current protection | Auto-recovery thermal shutdown and foldback current limiting prevent permanent damage during sustained overload. |
Applications
| Mobile Phone Baseband Power | RF Front-End Bias Rail |
|---|---|
Use Scenario: Supplying 2.8 V to baseband processor I/O banks in LTE smartphones with tight board area constraints. IC Role / Device Role / Timing Role: Primary LDO delivering clean, sequenced power to digital interface circuits during boot and sleep transitions. Use Value: High-ohmic disable prevents contention with other power domains during reset, while 80 mV dropout extends usable battery voltage range by >150 mV. | Use Scenario: Providing low-noise 2.8 V bias to PA driver stages and LNA modules in 5G sub-6 GHz front-ends. IC Role / Device Role / Timing Role: Low-noise post-regulator stabilizing switched-mode supply ripple before sensitive RF components. Use Value: 30 µV RMS noise and 55 dB PSRR reduce phase noise degradation in transmit chains by >3 dB compared to standard LDOs. |
| Wearable Sensor Hub Supply | USB-C Peripheral Interface |
Use Scenario: Powering always-on motion sensor fusion ICs in smartwatches with aggressive quiescent current targets. IC Role / Device Role / Timing Role: Always-active LDO supplying microamp-level standby current to MEMS sensors and wake-up logic. Use Value: 0.1 µA shutdown current minimizes battery drain during 99%+ idle time, extending coin-cell life beyond 12 months. | Use Scenario: Generating 2.8 V for USB-C controller logic and Type-C port detection circuitry in docking stations. IC Role / Device Role / Timing Role: Sequenced enable-controlled supply ensuring proper USB enumeration timing and hot-plug robustness. Use Value: Active-HIGH EN with 1.4 V threshold integrates seamlessly with 3.3 V USB-C PD controllers without level shifters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP1700T-2802E/MB | 250 mA rated, 175 mV dropout at 250 mA, SOT23-5 package, no thermal shutdown | Lacks thermal protection and has higher dropout; suitable only for low-ambient, low-power use cases | Select only if thermal margin exceeds 40 K and input headroom >300 mV is available |
| Torex XC6206P282MR-G | 150 mA rated, 160 mV dropout at 150 mA, SOT23-5, 45 µV noise, no enable pin | Fixed ON operation; lacks EN control and current capability for dynamic load scenarios | Use where simple always-on 2.8 V rail suffices and sequencing is not required |
Compared with MCP1700T-2802E/MB and XC6206P282MR-G, LD6806TD/28H,125 delivers superior thermal safety, lower dropout for extended battery life, and precise enable control - making it optimal for sequenced, thermally constrained, and noise-sensitive mobile power domains.
Availability
LD6806TD/28H,125 is available at Aetrix Electronics and suitable for mobile phone handsets, wearable sensor hubs, and USB-C peripheral interfaces requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for LD6806TD/28H,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company specializing in secure connectivity solutions for automotive, industrial, and mobile applications.
The LD6806 series belongs to NXP's ultra-low-noise, miniaturized LDO portfolio designed specifically for space- and power-constrained portable electronics requiring high PSRR, fast transient response, and robust thermal management.
FAQ
What is the maximum input voltage rating for LD6806TD/28H,125?
The LD6806TD/28H,125 supports an absolute maximum input voltage of +6.0 V for transient conditions up to 4 ms, with recommended continuous operation between 2.3 V and 5.5 V. Exceeding 6.0 V risks permanent damage to the internal PMOS pass element and reference circuitry. Always ensure input filtering and clamping are implemented in systems with potential voltage spikes.
Does LD6806TD/28H,125 require an external output capacitor, and what type is recommended?
Yes, LD6806TD/28H,125 requires a minimum 1.0 µF ceramic output capacitor with X7R dielectric and ESR between 5 mΩ and 500 mΩ for guaranteed stability. The capacitor must maintain ≥0.7 µF across −40 °C to +125 °C. Using insufficient capacitance or high-ESR types may cause oscillation or excessive startup overshoot in the LD6806TD/28H,125 output.
How does the high-ohmic output state function in LD6806TD/28H,125 during disable?
When the EN pin is driven LOW (<0.4 V), LD6806TD/28H,125 disables its pass transistor and places the OUT pin in a high-impedance (3-state) condition - effectively disconnecting the output from the internal regulator. This prevents backfeeding into the LDO from downstream circuits and enables safe power sequencing in multi-rail systems where LD6806TD/28H,125 shares a common output node.
What is the thermal resistance (Rth(j-a)) of LD6806TD/28H,125 in its SOT753 package?
The LD6806TD/28H,125 exhibits a typical junction-to-ambient thermal resistance of 125 K/W when mounted on a standard two-layer PCB with adequate copper pour. This value assumes solid thermal vias connecting the GND pin to inner ground planes. Poor layout - such as isolated pads or minimal copper - can degrade Rth(j-a) to >200 K/W, risking thermal shutdown under 200 mA load.
Can LD6806TD/28H,125 be used with a 1.8 V enable signal?
Yes, LD6806TD/28H,125 accepts 1.8 V as a valid HIGH enable signal because its VIH specification is ≥1.4 V (min) and VIL is ≤0.4 V (max). A 1.8 V logic rail meets both thresholds with 0.4 V noise margin, eliminating the need for external level translation. Ensure the 1.8 V source can drive the EN pin's negligible input capacitance without droop during fast transitions.
LD6806TD/28H,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 2.8V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.13V @ 200mA
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 100 µA
- Current - Supply (Max):
- 250 µA
- PSRR:
- 55dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSOP
LD6806TD/28H,125 FAQ
1.How can I place an order for LD6806TD/28H,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for LD6806TD/28H,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD6806TD/28H,125 reliable?
The price and inventory of LD6806TD/28H,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD6806TD/28H,125 is usually 5 days.
3.What payment methods are accepted for LD6806TD/28H,125?
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4.How is shipping managed for LD6806TD/28H,125?
LD6806TD/28H,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LD6806TD/28H,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LD6806TD/28H,125?
For technical support, including LD6806TD/28H,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD6806TD/28H,125 requirements.
6.How does Aetrix verify that LD6806TD/28H,125 is sourced from the original manufacturer or authorized distributors?
All LD6806TD/28H,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD6806TD/28H,125 meets industry standards.
7.What is the process for return or replacement of LD6806TD/28H,125?
All LD6806TD/28H,125 units undergo pre-shipment inspection (PSI). If there is an issue with LD6806TD/28H,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD6806TD/28H,125 part is unused and in its original packaging.
Return procedure for LD6806TD/28H,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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