NXP Semiconductors LD6815TD/12H,125
- Part No.:
- LD6815TD/12H,125
- Manufacturer:
- NXP Semiconductors
- Package:
- SC-74A, SOT-753
- Datasheet:
-
LD6815TD/12H,125.pdf
- Description:
- IC REG LINEAR 1.2V 150MA 5TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,976
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Product details
Overview
LD6815TD/12H from NXP Semiconductors is a fixed-output 1.2 V, 150 mA low-dropout regulator with ultra-high PSRR (75 dB at 1 kHz), 250 mV dropout at full load, and high-ohmic (3-state) output during disable. It operates from 2.3 V to 5.5 V input and targets noise-sensitive power rails in portable imaging and mobile processing subsystems.
For engineers reviewing the LD6815TD/12H datasheet, LD6815TD/12H pinout, LD6815TD/12H application, or LD6815TD/12H equivalent, key selection criteria include its 40 µV RMS output noise (10 Hz–100 kHz), 0.1 µA shutdown quiescent current, TSOP5 (SOT753) package compatibility, and high-ohmic disable behavior-critical for rail isolation in multi-regulator systems.
Technical Context
The LD6815TD/12H uses a PMOS pass transistor architecture enabling ultra-low dropout and high PSRR without requiring an external bias supply. Its enable input (EN) is active-HIGH with 1.1 V VIH threshold and supports fast startup (150 µs) into 1 µF capacitive loads.
Unlike pull-down variants (e.g., LD6815TD/12P), the /12H suffix denotes a high-ohmic output stage in shutdown mode-no internal discharge path-making it suitable for applications requiring strict output voltage hold-up or sequencing control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltage | Fixed 1.2 V ±2% over −40 °C to +85 °C; enables stable core logic or low-voltage sensor biasing. |
| Max output current | 150 mA continuous; sufficient for single-core microcontrollers or image signal processors. |
| Dropout voltage | 250 mV at 150 mA; allows operation down to VIN = 1.45 V while maintaining regulation. |
| PSRR | 75 dB at 1 kHz; suppresses switching noise from upstream DC-DC converters feeding noisy SoC rails. |
| RMS output noise | 40 µV (10 Hz–100 kHz); minimizes jitter in ADC reference supplies or RF front-end LDOs. |
| Quiescent current | 0.1 µA in shutdown; preserves battery life in always-on standby circuits. |
| Enable threshold | VIH = 1.1 V min; compatible with 1.8 V GPIOs without level-shifting. |
Pinout & Package
SOT753 (TSOP5) plastic surface-mount package: 2.9 × 1.5 × 1.0 mm, 5-lead, lead pitch 0.95 mm, JEDEC SC-74A compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - IN | Regulator input | Accepts 2.3–5.5 V unregulated supply; requires ≥0.7 µF input capacitor for stability. |
| 2 - GND | Power ground | Common return for input, output, and enable; must connect to low-impedance ground plane. |
| 3 - EN | Enable control | Active-HIGH digital input; pulls output to high-impedance state when <0.4 V. |
| 4 - n.c. | No connection | Internally unconnected; no PCB trace or pad required beyond mechanical support. |
| 5 - OUT | Regulated output | Delivers 1.2 V ±2%; requires ≥0.7 µF ceramic output capacitor with ESR 5–500 mΩ. |
Key Features
| Feature | Design Value |
|---|---|
| High-ohmic disable mode | Output enters true 3-state (high-Z) on EN deactivation-enables rail isolation without leakage paths. |
| Ultra-low noise | 40 µV RMS output noise (10 Hz–100 kHz) supports precision analog and RF subsystems. |
| ESD robustness | 6 kV HBM rating ensures reliability during board handling and assembly in high-volume mobile production. |
| Thermal performance | 125 K/W junction-to-ambient thermal resistance enables 150 mA operation at +85 °C ambient with minimal copper area. |
| Small footprint | SOT753 package occupies only 4.35 mm² PCB area-ideal for space-constrained smartphone camera modules. |
Applications
| Smartphone Camera Module | Digital Still Camera Sensor Bias |
|---|---|
|
Use Scenario: Powering CMOS image sensor analog front-end and PLL clock circuitry in compact smartphone rear cameras. IC Role / Device Role / Timing Role: Low-noise 1.2 V LDO supplying sensor analog core and timing generator, isolated during sleep via EN control. Use Value: 40 µV RMS noise prevents pixel-level fixed-pattern noise; 75 dB PSRR rejects noise from shared PMIC switchers. |
Use Scenario: Providing clean 1.2 V bias to high-resolution CCD/CMOS sensors in DSLR and mirrorless digital still cameras. IC Role / Device Role / Timing Role: Primary analog rail regulator with fast startup (150 µs) enabling rapid wake-from-sleep sensor activation. Use Value: 250 mV dropout allows operation from partially discharged Li-ion batteries; high-ohmic disable prevents cross-talk during multi-rail sequencing. |
| Tablet PC Application Processor Core | Portable Media Player Audio Codec |
|
Use Scenario: Delivering 1.2 V core voltage to ARM Cortex-A series application processors in 7–10 inch tablets. IC Role / Device Role / Timing Role: Secondary LDO post-regulating switched-mode supply; enabled synchronously with processor DVFS states. Use Value: 0.1 µA shutdown current extends standby time; 150 mA capacity supports burst-mode CPU loads without droop. |
Use Scenario: Supplying ultra-clean 1.2 V to stereo audio DAC/ADC and headphone amplifier in flash-based media players. IC Role / Device Role / Timing Role: Noise-critical analog supply decoupling audio signal chain from noisy digital subsystems. Use Value: 75 dB PSRR eliminates audible switching artifacts; SOT753 footprint fits tight audio subsystem layouts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LD6815TD/12P | Pull-down output stage (100 Ω Rpd) vs. high-ohmic /12H; identical electrical specs otherwise. | Required where auto-discharge of output capacitance is needed during shutdown (e.g., fast rail collapse). | Select /12P only if active discharge is mandatory; /12H is preferred for rail hold-up or isolation-critical designs. |
| Torex XC6219B122MR-G | 1.2 V, 150 mA, SOT-25; PSRR = 65 dB @ 1 kHz; 30 µV noise; no high-Z disable (active-low EN with pull-down). | Lacks true 3-state output; unsuitable for strict rail isolation but offers lower noise and smaller package. | Choose XC6219B122MR-G only for space-constrained, non-isolation applications where 10 dB lower PSRR is acceptable. |
Compared with LD6815TD/12P and XC6219B122MR-G, the LD6815TD/12H uniquely delivers verified 3-state disable behavior with industry-leading 75 dB PSRR-making it the sole option among the three for applications demanding both ultra-low noise and guaranteed output rail isolation.
Availability
LD6815TD/12H is available at Aetrix Electronics and suitable for smartphone camera modules, digital still camera sensor bias, and tablet application processor core power requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LD6815TD/12H includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.
The LD6815 series belongs to NXP's high-PSRR LDO portfolio, designed specifically for noise-sensitive analog and mixed-signal subsystems in portable electronics where rail integrity and battery efficiency are critical.
FAQ
What is the output voltage tolerance of the LD6815TD/12H over temperature?
The LD6815TD/12H maintains output voltage within ±2% of 1.2 V across −40 °C to +85 °C ambient temperature, with tighter ±0.5% variation at +25 °C. This accuracy ensures reliable operation of 1.2 V logic cores and analog sensor interfaces without external trimming.
Does the LD6815TD/12H require external capacitors, and what are the minimum values?
Yes, the LD6815TD/12H requires a minimum 0.7 µF ceramic output capacitor (X7R dielectric, ±30% tolerance) and recommends a 0.7 µF input capacitor. These values ensure stability, meet ESR requirements (5–500 mΩ), and maintain specified startup/shutdown timing per the LD6815TD/12H datasheet.
How does the high-ohmic disable mode of the LD6815TD/12H differ from the /12P variant?
The LD6815TD/12H enters a true high-impedance (3-state) output condition when disabled, isolating the output rail completely. In contrast, the LD6815TD/12P activates an internal 100 Ω pull-down transistor to discharge the output capacitor-making /12H essential for rail hold-up and sequencing-critical applications.
What is the maximum allowable input voltage for the LD6815TD/12H, and what protection exists against overvoltage?
The LD6815TD/12H supports absolute maximum input voltage of +6.0 V for 4 ms transients. It includes overcurrent protection and thermal shutdown, but no integrated overvoltage clamp-external TVS or input filtering is recommended if VIN may exceed 5.5 V under normal operation.
Can the LD6815TD/12H be used in automotive applications?
The LD6815TD/12H is qualified for consumer applications per NX1-00023 and operates from −40 °C to +85 °C ambient, but it is not AEC-Q200 qualified. For automotive use, NXP recommends automotive-grade alternatives such as the TDA3664 or other AEC-Q100 LDOs-not the LD6815TD/12H.
LD6815TD/12H,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.2V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.25V @ 150mA (Typ)
- Current - Output:
- 150mA
- Current - Quiescent (Iq):
- 35 µA
- Current - Supply (Max):
- 150 µA
- PSRR:
- 75dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Transient Voltage
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSOP
LD6815TD/12H,125 FAQ
1.How can I place an order for LD6815TD/12H,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for LD6815TD/12H,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD6815TD/12H,125 reliable?
The price and inventory of LD6815TD/12H,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD6815TD/12H,125 is usually 5 days.
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5.How can I obtain technical support or documentation for LD6815TD/12H,125?
For technical support, including LD6815TD/12H,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD6815TD/12H,125 requirements.
6.How does Aetrix verify that LD6815TD/12H,125 is sourced from the original manufacturer or authorized distributors?
All LD6815TD/12H,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD6815TD/12H,125 meets industry standards.
7.What is the process for return or replacement of LD6815TD/12H,125?
All LD6815TD/12H,125 units undergo pre-shipment inspection (PSI). If there is an issue with LD6815TD/12H,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD6815TD/12H,125 part is unused and in its original packaging.
Return procedure for LD6815TD/12H,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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