NXP Semiconductors LD6815TD/18H,125

Overview

LD6815TD/18H from NXP Semiconductors is a fixed-output 1.8 V, 150 mA low-dropout regulator with ultra-high PSRR (75 dB at 1 kHz), 250 mV dropout at full load, and high-ohmic (3-state) output during disable. It operates from 2.3 V to 5.5 V input and targets power-sensitive mobile applications requiring clean, stable voltage rails.

For engineers reviewing the LD6815TD/18H datasheet, LD6815TD/18H pinout, LD6815TD/18H application, or LD6815TD/18H equivalent, key selection criteria include its 1.8 V fixed output, TSOP5 (SOT753) package, 0.1 µA shutdown current, 40 µV RMS output noise (10 Hz–100 kHz), and enable-controlled 3-state output behavior - critical for sequencing and rail isolation in portable electronics.

Technical Context

The LD6815TD/18H employs a PMOS pass transistor architecture enabling low dropout and high PSRR without external compensation. Its enable input (active HIGH) directly controls internal biasing to force the output into a high-impedance state - no pull-down path - preserving downstream circuit integrity during power-down.

This variant belongs to the LD6815 series' "H" (high-ohmic) family, distinct from "P" variants that integrate an auto-discharge pull-down transistor. The device delivers 75 dB PSRR at 1 kHz and maintains ±0.5% output accuracy at +25 °C with 1 mA load, supporting precision analog and RF subsystems.

Key Specifications

Pinout & Package

SOT753 (TSOP5) plastic surface-mount package, 2.9 × 1.5 × 1.0 mm, monolithic silicon construction. Industry-standard 5-pin lead frame with exposed pad not present.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with TPS7A0518PDBVR and MCP1700T-1802E/TT, the LD6815TD/18H uniquely combines 3-state disable, 75 dB PSRR, and 0.1 µA shutdown in a 5-pin TSOP5 package - making it optimal for noise-critical, multi-rail mobile designs requiring precise power sequencing and rail isolation.

Availability

LD6815TD/18H is available at Aetrix Electronics and suitable for smartphone core power, tablet PC I/O rail, and digital still camera sensor bias applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for LD6815TD/18H includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and mobile markets.

The LD6815 series was designed specifically for ultra-low-noise, high-PSRR power regulation in space-constrained portable electronics - emphasizing 3-state disable, sub-µA shutdown, and robust ESD tolerance for next-generation mobile platforms.

FAQ

What is the output voltage tolerance of the LD6815TD/18H over temperature?

The LD6815TD/18H guarantees ±3% output voltage variation across −40 °C to +85 °C ambient temperature at 1 mA load. At +25 °C, output accuracy tightens to ±0.5%, ensuring reliable operation for precision 1.8 V logic and interface rails. This specification is confirmed in Table 8 of the official NXP datasheet Rev. 2 (2012).

Does the LD6815TD/18H support automatic discharge during shutdown?

No - the LD6815TD/18H is a high-ohmic ("H") variant and places the output in a true 3-state (Hi-Z) condition when disabled. It does not include the internal pull-down transistor found in "P" variants (e.g., LD6815TD/18P). This design prevents back-current and preserves voltage on downstream capacitors during power-down sequences.

What is the minimum recommended output capacitance for stable operation of the LD6815TD/18H?

The LD6815TD/18H requires a minimum external output capacitance of 0.7 µF, with 1.0 µF recommended. The capacitor must be X7R ceramic with ESR between 5 mΩ and 500 mΩ. This value ensures loop stability, adequate transient response, and compliance with the 150 µs start-up time specification under full load.

Can the LD6815TD/18H operate with a 2.3 V input while delivering 1.8 V at 150 mA?

Yes - the LD6815TD/18H supports VIN as low as 2.3 V. With a 1.8 V nominal output, the required minimum headroom is 250 mV at 150 mA. At VIN = 2.3 V, the available headroom is 500 mV, well above dropout, enabling full-rated output current with margin for line and load regulation.

What package type and dimensions does the LD6815TD/18H use?

The LD6815TD/18H uses the SOT753 (TSOP5) plastic surface-mount package: 2.9 mm × 1.5 mm × 1.0 mm body size with 0.95 mm lead pitch. Pin 1 is marked by a circle in the bottom-left corner per Figure 13 of the NXP datasheet. This JEDEC-standard 5-lead outline ensures compatibility with automated assembly and reflow processes.