STMicroelectronics LDK120PU18R

Overview

LDK120PU18R from STMicroelectronics is a 200 mA, 1.8 V fixed-output low-dropout linear regulator with 100 mV typical dropout at 100 mA, 100 µA max quiescent current, ±2.0% output voltage tolerance at 25 °C, and operation from 1.9 V to 5.5 V input. It delivers ultra-low-noise power for RF-sensitive analog circuitry in compact battery-powered devices.

For engineers reviewing the LDK120PU18R datasheet, LDK120PU18R pinout, LDK120PU18R application, or LDK120PU18R equivalent, this device supports critical low-power sequencing, noise-sensitive sensor biasing, and stable core voltage regulation where ceramic capacitor compatibility (1 µF COUT), logic-controlled shutdown (<1 µA OFF mode), and -40 °C to 125 °C operation are mandatory.

Technical Context

The LDK120PU18R implements a PMOS pass transistor architecture enabling ultra-low dropout and minimal load-dependent regulation shift (0.006 %/mA). Its internal bandgap reference and error amplifier deliver tight DC accuracy and high PSRR (55 dB from 120 Hz to 10 kHz) without external compensation.

It integrates logic-level enable control (V_IL ≤ 0.4 V, V_IH ≥ 1.2 V), thermal shutdown (160 °C with 20 °C hysteresis), and short-circuit current limiting (400 mA typ.), all operating across the full -40 °C to 125 °C junction temperature range.

Key Specifications

Pinout & Package

LDK120PU18R is packaged in DFN6 (1.2 × 1.3 mm, 0.45 mm height), a space-constrained, thermally enhanced leadless package suitable for high-density portable PCBs. Pin 5 (OUT) and Pin 1 (IN) are placed diagonally to minimize trace inductance; Pin 2 (GND) provides low-impedance thermal and signal return.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with XC6210B182MR-G and ADP160AUJZ-1.8-R7, the LDK120PU18R uniquely balances 200 mA drive, 100 mV dropout, integrated BYP noise reduction, and full fault protection - making it optimal for next-gen portable systems demanding both performance headroom and robustness.

Availability

LDK120PU18R is available at Aetrix Electronics and suitable for mobile phone power management, digital camera sensor biasing, wearable health monitoring, and industrial IoT edge nodes requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for LDK120PU18R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog components for automotive, industrial, and consumer markets.

The LDK120 series was developed specifically for ultra-low-noise, low-quiescent-current power regulation in space-constrained, battery-operated portable electronics - emphasizing ceramic capacitor compatibility, wide VIN range, and robust thermal behavior.

FAQ

What is the minimum input voltage required for LDK120PU18R to maintain regulation at 200 mA load?

The minimum input voltage is determined by dropout: at 200 mA, typical dropout is 150 mV (max 300 mV per datasheet Table 4). For a 1.8 V output, VIN must be ≥ 1.95 V (1.8 V + 150 mV) to sustain regulation. The absolute minimum specified VIN is 1.9 V, aligning with this margin under typical conditions.

Can LDK120PU18R be used with a 1 µF output capacitor without compromising stability?

Yes - the datasheet explicitly states compatibility with 1 µF ceramic COUT (Section 3, Figure 25). Stability is confirmed across the full 1–22 µF range for fixed versions; no ESR requirements or additional compensation components are needed, simplifying layout and BOM.

Is the BYP pin on LDK120PU18R mandatory to connect?

No - the BYP pin is optional for noise reduction. When used, a 10 nF ceramic capacitor between BYP and GND reduces output noise to 51 µV_RMS. If omitted, the pin must be left floating with no PCB trace; connecting it to any net risks instability or degraded noise performance.

How does the thermal shutdown behave during sustained overload?

Thermal shutdown activates at 160 °C junction temperature with 20 °C hysteresis. Once triggered, the LDO disables output until die temperature falls below 140 °C, then automatically resumes regulation. This cycle repeats under continuous overload, protecting the device without requiring external reset circuitry.