STMicroelectronics LDK120PU33R

Overview

LDK120PU33R from STMicroelectronics is a 3.3 V fixed-output, 200 mA low-dropout linear regulator with 100 µA max quiescent current, 100 mV typical dropout at 100 mA, ±2.0% output voltage tolerance at 25 °C, and compatibility with 1 µF ceramic output capacitors. It delivers ultra-low noise (51 µV_RMS, 10 Hz–100 kHz with 10 nF bypass) for powering sensitive analog and RF circuitry in compact battery-powered systems.

For engineers reviewing the LDK120PU33R datasheet, LDK120PU33R pinout, LDK120PU33R application, or LDK120PU33R equivalent, this page provides verified package mapping (DFN6, 1.2 × 1.3 mm), validated enable-controlled shutdown (<1 µA OFF mode), confirmed thermal protection (160 °C shutdown), and real-world load/line regulation performance (0.006 %/mA and 0.05 %/V).

Technical Context

The LDK120PU33R employs a PMOS pass transistor architecture enabling ultra-low dropout and near-zero gate-drive current, eliminating external compensation requirements. Its internal bandgap reference and error amplifier deliver tight DC accuracy across –40 °C to 125 °C while maintaining stability with minimal 1 µF ceramic C_OUT.

Logic-controlled EN pin provides clean, rail-to-rail compatible enable functionality with 0.4 V logic-low threshold and 1.2 V logic-high threshold over full temperature range. Integrated short-circuit constant-current limiting (400 mA typ.) and thermal foldback protect against fault conditions without external circuitry.

Key Specifications

Pinout & Package

LDK120PU33R is packaged in a 6-pin DFN (1.2 mm × 1.3 mm, 0.4 mm height) with wettable flanks, optimized for space-constrained PCB layouts and automated optical inspection (AOI). Pin 1 is marked by a dot; pin 5 is NC and must be connected to GND.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with XC6210B332MR-G and ADP160AUJZ-3.3-R7, the LDK120PU33R uniquely combines DFN6 footprint, integrated bypass noise reduction, full thermal/short-circuit protection, and 200 mA drive in a single 1.2 × 1.3 mm package-making it optimal for space- and noise-constrained embedded systems requiring field reliability.

Availability

LDK120PU33R is available at Aetrix Electronics and suitable for mobile wireless sensors, wearable health monitors, industrial IoT edge nodes, and automotive body control modules requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for LDK120PU33R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing silicon solutions for automotive, industrial, and consumer markets since 1987.

The LDK120 series belongs to ST's high-performance analog LDO portfolio, engineered specifically for ultra-low-noise, low-quiescent-current power management in portable and battery-operated equipment where size, efficiency, and signal integrity are critical.

FAQ

What is the minimum input voltage required for LDK120PU33R to regulate 3.3 V output?

The LDK120PU33R requires a minimum input voltage of 3.4 V to maintain regulation at full 200 mA load, based on its 100 mV typical dropout voltage. At lighter loads (e.g., 10 mA), regulation is maintained down to 3.31 V input. Input below 1.9 V is outside absolute maximum ratings and will disable operation.

Can the BYP pin be left unconnected on LDK120PU33R?

Yes-the BYP pin on the fixed-output LDK120PU33R is optional for noise reduction. If a 10 nF ceramic capacitor is not used, the pin must remain unconnected (floating) with no PCB trace or pad. ST explicitly states routing or grounding this pin degrades noise performance and may cause instability.

Is LDK120PU33R compatible with 0201-size 1 µF ceramic capacitors?

Yes-LDK120PU33R is fully compatible with 0201-case 1 µF X5R/X7R MLCCs (e.g., TDK C0201X5R1E105K030BC), provided their effective series resistance (ESR) remains below 1 Ω at 100 kHz. ST's stability analysis confirms stable operation across the full 1–22 µF C_OUT range with ESR as low as 0.01 Ω.

Does LDK120PU33R require an input capacitor?

Yes-a 1 µF ceramic capacitor (C_IN) is mandatory and must be placed within 2 mm of the IN and GND pins. This capacitor suppresses high-frequency noise from upstream sources and prevents oscillation during transient load steps. Omitting C_IN risks instability and degraded PSRR performance, especially when fed from switchers or long PCB traces.