My Inquiry
My Account
STMicroelectronics LDL112DR
- Part No.:
- LDL112DR
- Manufacturer:
- STMicroelectronics
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LDL112DR.pdf
- Description:
- IC REG LINEAR POS ADJ 1.2A 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,336
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LDL112DR from STMicroelectronics is an adjustable low-dropout linear regulator delivering up to 1.2 A output current with 300 mV typical dropout at 1 A, ±2.0% output voltage accuracy at 25 °C, and reverse current protection. It operates from 1.6 V to 5.5 V input and supports output voltages from 0.8 V to 5 V in 50 mV steps-ideal for USB-powered devices and battery-powered point-of-load regulation.
For engineers reviewing the LDL112DR datasheet, LDL112DR pinout, LDL112DR application, or LDL112DR equivalent, this page provides verified pin functions, thermal and short-circuit protection behavior, ceramic capacitor compatibility (1 µF), enable-controlled shutdown (<1 µA off-mode current), and design-meaning specifications for low-power embedded systems.
Technical Context
The LDL112DR uses a PMOS pass transistor architecture with internal bandgap reference (800 mV) and error amplifier, enabling stable regulation down to 0.8 V via external resistor divider on the ADJ pin. Its reverse current protection actively blocks VOUT-to-VIN conduction in both on- and off-states by dynamically switching gate and bulk terminals to VOUT when reverse bias exceeds 100 mV.
Thermal shutdown triggers at 165 °C with 20 °C hysteresis, and current limiting caps output at ~1.4–2 A. The device achieves 57 dB PSRR at 1 kHz (fixed version) and 53 dB (adjustable), with 60 µVRMS output noise (10 Hz–100 kHz) and load regulation of 6–20 mV across 0–1.2 A.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output current | 1.2 A guaranteed - supports high-current microcontroller cores or FPGA I/O banks without external boost. |
| Dropout voltage | 300 mV typ. at 1 A - enables regulation from 3.6 V input to 3.3 V output with only 300 mV headroom. |
| Quiescent current | 35 µA typ. at no load - extends battery life in always-on sensor nodes or standby modes. |
| Output accuracy | ±2.0% at 25 °C - ensures reliable logic-level compliance for 1.8 V or 3.3 V digital rails. |
| Enable threshold | VIL ≤ 0.35 V, VIH ≥ 1.4 V - compatible with 1.8 V/3.3 V GPIO without level-shifting. |
| Reverse current protection | Active blocking when VOUT > VIN + 100 mV - prevents backfeed in multi-rail systems or hot-swap scenarios. |
| Capacitor support | Stable with 1 µF ceramic COUT - eliminates need for bulky tantalum or electrolytic capacitors. |
Pinout & Package
LDL112DR is available in DFN6 (3x3) mm, DFN6 (2x2) mm, SO8-batwing, and PPAK packages. The exposed pad must be connected to GND for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | LDO input supply | Accepts 1.6–5.5 V DC; requires local 1 µF ceramic bypass capacitor. |
| GND | Power and signal reference | Common return path; exposed pad must be soldered to PCB ground plane. |
| EN | Logic-controlled enable | Active-high; <0.35 V = shutdown (<1 µA IQ), >1.4 V = active; must not float. |
| ADJ | Adjustable feedback node | Internal 800 mV reference; sets VOUT = 0.8 V × (1 + R1/R2); max 1 µA input current. |
| VOUT | Regulated output | Delivers up to 1.2 A; reverse current protected; supports 1–10 µF ceramic output capacitance. |
| NC | No connect | Not internally bonded; leave unconnected per package variant. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low quiescent current | 35 µA typ. at no load - enables >1-year battery life in coin-cell–powered IoT sensors. |
| Reverse current blocking | Active MOSFET gate/bulk control - eliminates external diode in OR-ing or backup power paths. |
| Ceramic capacitor stability | 1 µF minimum COUT - reduces board area and cost vs. traditional LDOs requiring ≥10 µF. |
| Wide adjustable output range | 0.8 V to 5 V in 50 mV steps - supports core voltages for ARM Cortex-M, RISC-V, and low-voltage FPGAs. |
| Integrated protections | Current limit (~2 A) + thermal shutdown (165 °C) - eliminates need for external fault management circuitry. |
Applications
| USB-C Power Delivery Sink | Wearable Sensor Node |
|---|---|
Use Scenario: Regulating 5 V USB-C input to 1.8 V for BLE SoC and analog front-end. IC Role / Device Role / Timing Role: Adjustable LDO providing clean, low-noise 1.8 V rail with fast load transient response. Use Value: 60 µVRMS noise and 20 mV load regulation ensure ADC accuracy and RF receiver sensitivity. |
Use Scenario: Powering ultra-low-power MCU and MEMS accelerometer from single Li-ion cell (3.0–4.2 V). IC Role / Device Role / Timing Role: Primary voltage regulator with enable control synchronized to sensor sampling intervals. Use Value: 35 µA quiescent current and <1 µA shutdown current extend battery runtime beyond 36 months. |
| Industrial PLC I/O Module | Automotive Body Control Unit |
Use Scenario: Generating isolated 3.3 V logic supply for digital isolators and CAN transceivers. IC Role / Device Role / Timing Role: Reverse-current-protected LDO preventing backfeed into main 5 V bus during partial system power-down. Use Value: Active blocking at VOUT > VIN + 100 mV avoids latch-up and ensures safe hot-swap operation. |
Use Scenario: Supplying 2.5 V camera image sensor in rear-view module with cold-crank tolerance. IC Role / Device Role / Timing Role: Input-capable LDO operating down to 1.6 V input, supporting 4.5 V cold-crank condition. Use Value: 300 mV dropout at 1 A allows stable 2.5 V output even when battery dips to 2.8 V. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar adjustable LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6210B182MR-G | Fixed 1.8 V output; 1 A rating; 250 mV dropout; no reverse current protection. | Requires redesign for adjustable output; lacks reverse-blocking capability for multi-source systems. | Select only if fixed 1.8 V suffices and reverse current risk is absent. |
| Analog Devices ADM7172ACPZ-3.3-R7 | 3.3 V fixed; 2 A rating; 120 mV dropout; 12 µVRMS noise; requires ≥2.2 µF COUT. | Higher performance but incompatible pinout and higher BOM cost; no ADJ pin for voltage flexibility. | Choose only when ultra-low noise and sub-200 mV dropout outweigh adjustability and cost constraints. |
Compared with LDL112DR, XC6210B182MR-G sacrifices adjustability and reverse protection for lower dropout, while ADM7172ACPZ-3.3-R7 offers superior noise and efficiency but locks output voltage and increases capacitor requirements-making LDL112DR optimal for flexible, cost-sensitive, multi-rail battery systems.
Availability
LDL112DR is available at Aetrix Electronics and suitable for USB-powered devices, wearable sensor nodes, industrial PLC I/O modules, and automotive body control units requiring stable component supply across extended temperature ranges (-40 °C to 125 °C).
Supply support for LDL112DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader specializing in power management, microcontrollers, and analog ICs, with manufacturing aligned to ISO 9001 and AEC-Q200 standards.
The LDL112 series targets low-power, high-reliability applications in portable electronics and automotive subsystems, emphasizing ultra-low IQ, reverse current safety, and ceramic capacitor compatibility.
FAQ
What output voltage range does LDL112DR support, and how is it set?
The LDL112DR supports 0.8 V to 5 V output in 50 mV increments, set externally using a resistor divider between ADJ and VOUT. The internal 800 mV reference yields VOUT = 0.8 V × (1 + R1/R2). Recommended R1/R2 values are 10 kΩ–50 kΩ to balance accuracy and quiescent current.
Does LDL112DR require an output capacitor, and what type is recommended?
Yes, LDL112DR requires a minimum 1 µF ceramic capacitor at VOUT for stability, with support up to 10 µF. Unlike many LDOs, it does not need ESR-tuned tantalum or aluminum electrolytics-enabling smaller footprint and higher reliability in space-constrained designs.
How does reverse current protection operate in LDL112DR?
LDL112DR actively blocks reverse current by switching the PMOS gate and bulk terminals to VOUT when VOUT exceeds VIN by >100 mV. This occurs in both EN=low (shutdown) and EN=high (active) states, eliminating backfeed in multi-supply systems without external diodes.
What thermal derating applies to LDL112DR in DFN6 (3x3) package?
In DFN6 (3x3) package, LDL112DR has RthJA = 55 °C/W. At 25 °C ambient, maximum continuous power dissipation before thermal shutdown is ~1.8 W (calculated as (125 − 25)/55). Derate linearly above 25 °C ambient; full 1.2 A load requires adequate copper pour or forced airflow above 60 °C ambient.
LDL112DR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Adjustable
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 4.9V
- Voltage Dropout (Max):
- 0.6V @ 1.2A
- Current - Output:
- 1.2A
- Current - Quiescent (Iq):
- 70 µA
- Current - Supply (Max):
- 400 µA
- PSRR:
- 53dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Reverse Current
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
LDL112DR FAQ
1.How can I place an order for LDL112DR through Aetrix?
Please submit a Request for Quotation (RFQ) for LDL112DR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LDL112DR reliable?
The price and inventory of LDL112DR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LDL112DR is usually 5 days.
3.What payment methods are accepted for LDL112DR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LDL112DR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LDL112DR?
LDL112DR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LDL112DR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LDL112DR?
For technical support, including LDL112DR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LDL112DR requirements.
6.How does Aetrix verify that LDL112DR is sourced from the original manufacturer or authorized distributors?
All LDL112DR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LDL112DR meets industry standards.
7.What is the process for return or replacement of LDL112DR?
All LDL112DR units undergo pre-shipment inspection (PSI). If there is an issue with LDL112DR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LDL112DR part is unused and in its original packaging.
Return procedure for LDL112DR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LDL112DR Tags
-
MIC5504-1.8YM5-TR
Microchip Technology
-
MIC5504-3.3YM5-TR
Microchip Technology
-
MIC5365-3.0YC5-TR
Microchip Technology
-
MIC5365-1.8YC5-TR
Microchip Technology
-
MIC5365-2.5YC5-TR
Microchip Technology
-
MIC5365-3.3YC5-TR
Microchip Technology
-
MIC5365-3.3YD5-TR
Microchip Technology
-
MIC5317-3.3YM5-TR
Microchip Technology
-
TLV1117LV33DCYR
Texas Instruments
-
MIC5317-3.3YMT-TZ
Microchip Technology
-
MIC5528-3.3YMT-TR
Microchip Technology
-
TLV75801PDRVR
Texas Instruments
Tech Hub
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
