STMicroelectronics LDL112PV15R
- Part No.:
- LDL112PV15R
- Manufacturer:
- STMicroelectronics
- Package:
- 6-VDFN Exposed Pad
- Datasheet:
-
LDL112PV15R.pdf
- Description:
- IC REG LINEAR 1.5V 1.2A 6DFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,460
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LDL112PV15R from STMicroelectronics is a fixed-output 1.5 V, 1.2 A low-dropout linear regulator with 300 mV typical dropout at 1 A, ±2.0% output voltage accuracy at 25 °C, reverse current protection, and logic-controlled shutdown. It operates from 1.6 V to 5.5 V input and supports ceramic output capacitors as low as 1 µF - used in USB-powered devices and battery-powered point-of-load regulation.
For engineers reviewing the LDL112PV15R datasheet, LDL112PV15R pinout, LDL112PV15R application, or LDL112PV15R equivalent, key selection criteria include dropout performance under 1.2 A load, shutdown current <1 µA, thermal protection at 165 °C, reverse current blocking behavior, and compatibility with 1 µF ceramic COUT in space-constrained DFN6 (3x3) or DFN6 (2x2) packages.
Technical Context
The LDL112PV15R uses a PMOS pass transistor architecture enabling ultra-low dropout and inherent reverse current blocking without external components. Its bandgap-referenced op-amp control loop maintains 1.5 V output with static line regulation of 0.05–0.1 %/V and load regulation of 15–30 mV across 0–1.2 A.
Thermal shutdown activates at 165 °C with 20 °C hysteresis, and internal current limiting caps short-circuit current at 1.4–2 A. The EN pin accepts TTL/CMOS logic levels (VIL ≤ 0.35 V, VIH ≥ 1.4 V), and the exposed pad must be connected to GND for thermal and electrical integrity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.5 V ±2.0% at 25 °C - ensures stable core/bias rail for low-voltage microcontrollers and sensors. |
| Max Output Current | 1.2 A guaranteed - supports moderate-power peripherals without external boost circuitry. |
| Dropout Voltage | 300 mV typ. at 1 A - enables operation down to VIN = 1.8 V while maintaining regulated 1.5 V output. |
| Quiescent Current | 35 µA typ. at no load - extends battery life in always-on IoT endpoints and wearables. |
| Shutdown Current | ≤1 µA max. - meets ultra-low-power system sleep-state requirements. |
| Input Voltage Range | 1.6 V to 5.5 V - compatible with single-cell Li-ion, Li-poly, and USB 5 V sources. |
| Output Capacitor | 1 µF ceramic minimum - reduces BOM count and PCB area vs. electrolytic/tantalum alternatives. |
Pinout & Package
LDL112PV15R is available in DFN6 (3x3) mm and DFN6 (2x2) mm packages, both featuring an exposed thermal pad that must be soldered to GND for optimal thermal performance and electrical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | LDO input supply | Accepts 1.6–5.5 V; requires local 1 µF ceramic decoupling capacitor. |
| GND | Power and signal reference | Common return path; exposed pad must be connected to GND plane for thermal conduction. |
| EN | Logic enable input | Active-high: VIH ≥ 1.4 V, VIL ≤ 0.35 V; floating prohibited - tie to VIN or GND via resistor. |
| VOUT | Regulated output | Delivers fixed 1.5 V ±2.0%; stable with 1–10 µF ceramic output capacitor. |
| NC | No-connect terminal | Not internally bonded; left unconnected per datasheet guidance. |
Key Features
| Feature | Design Value |
|---|---|
| Reverse current protection | Blocks backflow from VOUT to VIN during shutdown or overvoltage events - eliminates need for external blocking diode. |
| Ultra-low dropout | 300 mV at 1 A enables use with weak or depleting batteries where headroom is critical. |
| Thermal & current limit | Internally limits output to ~2 A and shuts down at 165 °C - prevents damage during overload or poor heatsinking. |
| 1 µA shutdown mode | Reduces system standby power to sub-microwatt level - essential for energy-harvesting and coin-cell applications. |
| Ceramic capacitor compatible | Stable with 1 µF COUT - avoids ESR dependency and improves transient response vs. tantalum/electrolytic. |
Applications
| USB-Powered Sensors | Wearable Health Monitors |
|---|---|
|
Use Scenario: Compact wearable device powered directly from USB 5 V, regulating down to 1.5 V for analog front-end and low-power MCU core. IC Role / Device Role / Timing Role: Primary point-of-load LDO delivering clean, low-noise 1.5 V bias to ADCs and op-amps. Use Value: 135 µVRMS output noise and 57 dB PSRR at 1 kHz ensure high-fidelity sensor signal integrity. |
Use Scenario: Battery-operated pulse oximeter using single Li-poly cell (2.7–4.2 V), requiring stable 1.5 V for optical driver and signal chain. IC Role / Device Role / Timing Role: Main power regulator with reverse current blocking during battery swap or charger insertion. Use Value: Reverse current protection prevents discharge into dead battery or charger backfeed, extending runtime and safety. |
| Low-Voltage Microcontroller Cores | Industrial Edge Node Controllers |
|
Use Scenario: Sub-2 V logic core supply for ARM Cortex-M0+ MCU in energy-efficient industrial sensor node. IC Role / Device Role / Timing Role: Fixed 1.5 V LDO supplying I/O and core domains with tight ±2.0% tolerance across -40 to 125 °C. Use Value: Guaranteed 1.2 A output and 30 mV load regulation support dynamic current bursts without brownout. |
Use Scenario: DIN-rail mounted controller with wide-input 12–24 V DC supply, stepping down to 1.5 V for FPGA configuration memory and interface logic. IC Role / Device Role / Timing Role: Secondary LDO stage after buck converter, providing low-noise, thermally robust local regulation. Use Value: DFN6 (3x3) package with 55 °C/W RthJA and thermal shutdown enable reliable operation in 70 °C ambient enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-dropout linear regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6219B152MR-G | 1.5 V fixed, 300 mA max, 150 mV dropout at 100 mA - lower current rating and no reverse current protection. | Suitable only for ultra-low-power logic rails (<300 mA); lacks thermal/current limit and reverse blocking. | Select only when load current ≤300 mA and reverse current risk is absent. |
| ROHM BD3572EFJ-ME2 | 1.5 V fixed, 1 A max, 250 mV dropout at 500 mA, 1 µA shutdown - no reverse current protection, higher quiescent current (100 µA). | Acceptable for cost-sensitive consumer apps but unsuitable where backfeed prevention is required. | Prefer when thermal margin exists and reverse current is not a system-level concern. |
Compared with XC6219B152MR-G and BD3572EFJ-ME2, the LDL112PV15R uniquely combines 1.2 A capability, reverse current blocking, and sub-1 µA shutdown in a thermally optimized DFN package - making it the only choice for robust, high-current, battery-critical 1.5 V regulation.
Availability
LDL112PV15R is available at Aetrix Electronics and suitable for USB-powered devices, battery-powered systems, and low-voltage point-of-load applications requiring stable component supply, long-term lifecycle assurance, and automotive-grade thermal reliability.
Supply support for LDL112PV15R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, power, microcontroller, and sensor solutions for industrial, automotive, and consumer markets.
The LDL112 series belongs to ST's precision low-quiescent-current LDO portfolio, engineered specifically for energy-constrained portable and always-on edge devices demanding ultra-low shutdown current, reverse current isolation, and ceramic-capacitor stability.
FAQ
What is the minimum input voltage required to maintain 1.5 V output at 1.2 A?
The LDL112PV15R requires VIN ≥ VOUT + VDROP. At 1.2 A and -40 °C to 125 °C, maximum dropout is 600 mV per datasheet Table 4. Thus, minimum VIN = 1.5 V + 0.6 V = 2.1 V. Below this, output drops out of regulation.
Can LDL112PV15R be used with a 0.47 µF output capacitor?
No. The datasheet specifies 1 µF minimum ceramic COUT for stability across all operating conditions. Using 0.47 µF risks oscillation or poor transient response, especially under load steps or temperature extremes - confirmed by Figure 25 stability boundary.
Does the EN pin require a pull-up or pull-down resistor?
Yes. The EN pin must never be left floating. For active-high operation, connect via 10–100 kΩ resistor to VIN. For forced shutdown, tie directly to GND. Input leakage is ≤100 nA, so weak pull-ups are acceptable, but floating causes undefined state and potential shoot-through.
Is reverse current protection active during EN = low?
Yes. Per Section 6.3, reverse current blocking is fully active in shutdown (EN = GND). When VOUT > VIN + 100 mV, the PMOS pass element is turned off and gate/bulk are switched to VOUT, physically interrupting all current paths from output to input - verified in both on- and off-states.
LDL112PV15R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 6-VDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.5V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.6V @ 1.2A
- Current - Output:
- 1.2A
- Current - Quiescent (Iq):
- 70 µA
- Current - Supply (Max):
- 400 µA
- PSRR:
- 57dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Reverse Current
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-DFN (3x3)
LDL112PV15R FAQ
1.How can I place an order for LDL112PV15R through Aetrix?
Please submit a Request for Quotation (RFQ) for LDL112PV15R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LDL112PV15R reliable?
The price and inventory of LDL112PV15R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LDL112PV15R is usually 5 days.
3.What payment methods are accepted for LDL112PV15R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LDL112PV15R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LDL112PV15R?
LDL112PV15R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LDL112PV15R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LDL112PV15R?
For technical support, including LDL112PV15R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LDL112PV15R requirements.
6.How does Aetrix verify that LDL112PV15R is sourced from the original manufacturer or authorized distributors?
All LDL112PV15R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LDL112PV15R meets industry standards.
7.What is the process for return or replacement of LDL112PV15R?
All LDL112PV15R units undergo pre-shipment inspection (PSI). If there is an issue with LDL112PV15R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LDL112PV15R part is unused and in its original packaging.
Return procedure for LDL112PV15R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LDL112PV15R Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

