STMicroelectronics LDLN015PU12R

Overview

LDLN015PU12R from STMicroelectronics is a 150 mA ultra-low-noise linear voltage regulator with fixed 1.2 V output, 6.3 µV_RMS noise (10 Hz–100 kHz), 86 mV typical dropout at 150 mA, and 35 µA quiescent current at no load-designed for powering noise-sensitive analog circuitry in battery-powered mobile devices.

For engineers reviewing the LDLN015PU12R datasheet, LDLN015PU12R pinout, LDLN015PU12R application, or LDLN015PU12R equivalent, key selection criteria include output noise floor, PSRR above 90 dB at 1 kHz, logic-controlled shutdown (<2 µA off-mode current), ceramic capacitor compatibility (0.47 µF min), and DFN6 (2 × 2 mm) thermal performance (R_thJA = 105 °C/W).

Technical Context

The LDLN015PU12R employs a low-noise bandgap reference and precision error amplifier to maintain ±1% output accuracy across –40 °C to 125 °C and load currents up to 150 mA. Its internal current limiting and thermal shutdown (166 °C trip, 10 °C hysteresis) ensure robust operation under fault conditions.

PSRR exceeds 90 dB below 1 kHz and remains >50 dB up to 100 kHz, while the enable input (VEN < 0.4 V = OFF, VEN > 0.9 V = ON) provides precise system-level power sequencing without external components. The device operates stably with 0.47 µF ceramic output capacitance and requires no bypass capacitor.

Key Specifications

Pinout & Package

Package: DFN6 (2 × 2 mm), 0.5 mm pitch, exposed thermal pad electrically connected to GND-provides low R_thJC = 20 °C/W for efficient heat dissipation in space-constrained layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ultra-low-noise LDO regulator applications.

Compared with XC6210B122MR-G and ADP125ARHZ-1.2-R7, LDLN015PU12R delivers the lowest noise (6.3 µV_RMS) and highest PSRR at 1 kHz (92 dB), making it uniquely suitable for RF and high-resolution data acquisition where spectral purity is non-negotiable.

Availability

LDLN015PU12R is available at Aetrix Electronics and suitable for mobile RF front-end power, portable medical sensor bias, and wearable always-on sensor hub designs requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for LDLN015PU12R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog products for automotive, industrial, and consumer markets.

The LDLN015 series belongs to ST's ultra-low-noise LDO portfolio, engineered specifically for powering noise-critical analog and RF circuitry in space- and power-constrained portable electronics.

FAQ

What is the minimum input voltage required for stable 1.2 V output at 150 mA load?

The LDLN015PU12R requires VIN ≥ VOUT + VDROP = 1.2 V + 0.086 V = 1.286 V minimum for full 150 mA output. However, the absolute minimum operating VIN is specified as 2.1 V per datasheet-below this voltage, regulation is not guaranteed and PSRR/noise performance degrades significantly.

Can the LDLN015PU12R be used with a 0.22 µF ceramic output capacitor?

No. The datasheet specifies a minimum COUT of 0.33 µF and recommends 0.47 µF for guaranteed stability across temperature and load. Using 0.22 µF risks oscillation and degraded transient response, especially at light loads or high ambient temperatures.

Does the exposed thermal pad on the DFN6 package require solder connection to PCB ground?

Yes. The exposed pad is electrically connected to GND and must be soldered to a thermally optimized GND plane using ≥4 thermal vias. Omitting this connection increases junction-to-ambient thermal resistance by >40%, risking thermal shutdown under 100+ mA loads.

How does the enable pin behave during power-up when VIN rises before EN is asserted?

The device remains in shutdown until EN exceeds 0.9 V. With VIN applied but EN held ≤0.4 V, quiescent current stays below 2 µA. No power-up sequencing is required-the EN pin is immune to partial VIN ramping, preventing unintended turn-on during system boot.