STMicroelectronics LDLN025J2925R

Overview

LDLN025J2925R from STMicroelectronics is a 250 mA ultra-low-noise, low-dropout linear regulator with 2.925 V fixed output voltage, designed for noise-sensitive analog and RF circuits. It operates from 1.5 V to 5.5 V input, delivers 6.5 µV_RMS output noise (10 Hz–100 kHz), achieves 250 mV dropout at 250 mA (DFN4-1x1), and maintains ±2% output accuracy across –40 °C to +125 °C.

For engineers reviewing the LDLN025J2925R datasheet, LDLN025J2925R pinout, LDLN025J2925R application, or LDLN025J2925R equivalent, this LDO is selected for precision power in image sensors, VCO biasing, ADC reference supplies, and portable RF modules where PSRR >60 dB @100 kHz and sub-12 µA quiescent current are critical.

Technical Context

The LDLN025J2925R implements a bandgap-referenced error amplifier driving a PMOS pass transistor, enabling ultra-low dropout and controlled quiescent current even in dropout. Its internal soft-start and output discharge circuitry prevent inrush spikes and ensure clean power sequencing.

It features logic-controlled enable (VEN high = on, VEN low = shutdown <1 µA), thermal shutdown at 160 °C with 20 °C hysteresis, and overcurrent protection limiting short-circuit current to 250–500 mA. Stability is guaranteed with 0.7–10 µF ceramic output capacitors and ESR ≤500 mΩ.

Key Specifications

Pinout & Package

LDLN025J2925R is available in Flip-Chip4 (0.41 mm × 0.63 mm), DFN4-1x1 (1.0 mm × 1.0 mm), and SOT23-5L packages. This specific variant uses Flip-Chip4 - a bottom-terminated, leadless die-scale package requiring solder paste stencil and reflow-compatible PCB layout with exposed pad tied to GND.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-noise LDO applications.

Compared with XC6210B292MR and ADP125ARHZ-2.925-R7, LDLN025J2925R uniquely balances ultra-low noise (6.5 µV_RMS), 250 mA capability, enable/discharge functionality, and DFN4/Flip-Chip scalability - making it optimal for miniaturized, battery-powered RF and imaging systems demanding both precision and efficiency.

Availability

LDLN025J2925R is available at Aetrix Electronics and suitable for smartphone camera modules, portable RF transceivers, precision data acquisition systems, and wearable medical sensors requiring stable component supply with full traceability and long-term lifecycle support.

Supply support for LDLN025J2925R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog components for industrial, automotive, and consumer markets.

The LDLN025 series belongs to ST's ultra-low-noise LDO portfolio, engineered specifically for powering sensitive analog and RF circuitry in battery-operated portable electronics where PSRR, noise, and quiescent current are decisive performance parameters.

FAQ

What is the recommended input and output capacitor configuration for LDLN025J2925R?

Use a minimum 0.7 µF X7R ceramic capacitor at the input (C_IN) and 0.7–10 µF X7R ceramic at the output (C_OUT). The datasheet specifies ESR ≤500 mΩ for stability. A 1 µF/0603 C_IN and 1 µF/0603 C_OUT are validated in the typical application diagram and provide optimal transient response and PSRR across frequency.

Does LDLN025J2925R require an external resistor divider for output voltage setting?

No. LDLN025J2925R is a fixed-output LDO with factory-trimmed 2.925 V regulation. It does not support adjustable output via external resistors. The "J" suffix denotes Flip-Chip4 packaging, and the "2925" marking directly indicates the 2.925 V output version per Table 9 in DS11756 Rev 8.

How does the output discharge feature operate during shutdown?

When EN is pulled low, an internal 230 Ω switch connects VOUT to GND, actively discharging the output capacitor. This prevents residual voltage from interfering with downstream logic states or causing latch-up in adjacent circuits. Discharge time depends on C_OUT value - e.g., 1 µF discharges to <100 mV in ~230 µs.

Can LDLN025J2925R be used with a 1.8 V input supply?

No. The absolute minimum input voltage is 1.5 V, but the regulator requires VIN ≥ VOUT + dropout voltage to maintain regulation. With VOUT = 2.925 V and typical dropout of 120 mV (120 mV at 250 mA in typical conditions), VIN must be ≥3.045 V. At 1.8 V input, the device enters dropout and cannot sustain 2.925 V output.