STMicroelectronics LDLN025PU28R

Overview

LDLN025PU28R from STMicroelectronics is a 250 mA ultra-low-noise low-dropout (LDO) voltage regulator in DFN4-1x1 package, delivering 2.8 V output with ±2% accuracy across -40 °C to +125 °C, 1.5–5.5 V input range, and 6.5 μVRMS output noise (10 Hz–100 kHz). It features 12 μA quiescent current at no-load, 250 mV dropout at 250 mA, and 80 dB PSRR at 100 Hz-optimized for powering noise-sensitive RF and analog circuits in portable devices.

For engineers reviewing the LDLN025PU28R datasheet, LDLN025PU28R pinout, LDLN025PU28R application, or LDLN025PU28R equivalent, this LDO is selected for high-PSRR, low-noise power rail generation in battery-constrained systems where output stability under load transients, thermal robustness, and logic-controlled shutdown are critical design requirements.

Technical Context

The LDLN025PU28R employs a bandgap-referenced error amplifier driving a PMOS pass transistor, enabling ultra-low dropout and controlled quiescent current even in dropout condition. Its internal soft-start and output discharge circuitry suppress inrush current and ensure clean power sequencing.

Stability is guaranteed with 1 μF ceramic output capacitors (ESR 5–500 mΩ), and its enable input (VIH = 1.2 V, VIL = 0.4 V) supports direct interfacing with 1.8 V/3.3 V logic. Thermal shutdown activates at 160 °C with 20 °C hysteresis, and short-circuit protection limits output current to 250–500 mA.

Key Specifications

Pinout & Package

LDLN025PU28R is supplied in the DFN4-1x1 (1.0 mm × 1.0 mm × 0.38 mm) thermally enhanced package with exposed pad connected to GND. This 4-pin leadless package delivers 200 °C/W junction-to-ambient thermal resistance and supports high-density PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-noise LDO applications.

Compared with XC6210B282MR-G and ADP160AUJZ-2.8-R7, LDLN025PU28R provides 25% higher output current, 45% lower output noise, and superior thermal performance in a 1 mm² footprint-making it the optimal choice for next-generation RF and imaging power rails demanding both density and spectral purity.

Availability

LDLN025PU28R is available at Aetrix Electronics and suitable for smartphone RF modules, medical imaging sensors, industrial wireless nodes, and automotive camera systems requiring stable component supply with full traceability and long-term lifecycle support.

Supply support for LDLN025PU28R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing silicon solutions for automotive, industrial, and consumer markets since 1987.

The LDLN025 series belongs to ST's ultra-low-noise LDO product line, engineered specifically for powering sensitive analog and RF circuitry in battery-operated portable electronics where noise, efficiency, and thermal reliability are non-negotiable.

FAQ

What is the minimum input voltage required for LDLN025PU28R to maintain regulation at 250 mA load?

The minimum input voltage is determined by dropout: 2.8 V + 0.25 V = 3.05 V. At 250 mA and -40 °C to +125 °C, the maximum dropout is 250 mV for the DFN4-1x1 package. Below this input, output voltage collapses linearly with VIN. Input must also stay within absolute max ratings (≥ –0.3 V, ≤ 7 V).

Can LDLN025PU28R be used with tantalum output capacitors?

No. The device is optimized for ceramic capacitors (0.7–10 μF, 5–500 mΩ ESR). Tantalum capacitors typically exhibit higher ESR (>500 mΩ) and risk instability or oscillation. Using them voids guaranteed stability per DS11756 Rev 8 Section 5 and Figure 19's stability region.

Does the exposed pad on the DFN4-1x1 package require a dedicated thermal via array?

Yes. The exposed pad must be soldered to a solid PCB ground plane, and ST recommends ≥4 thermal vias (0.3 mm diameter, 0.6 mm pitch) connecting it to inner-layer or back-side ground planes to achieve the rated 200 °C/W R_thJA. Omission increases junction temperature by up to 40 °C at full load.

How does the output discharge function behave during EN deactivation?

When EN falls below 0.4 V, an internal 230 Ω switch connects VOUT to GND, discharging the output capacitor. For a 1 μF COUT, VOUT falls from 2.8 V to <100 mV in ~1.8 ms (τ = R×C = 230 Ω × 1 μF). This prevents residual voltage from interfering with downstream power sequencing or causing latch-up.