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Microchip Technology LE58083ABGC
- Part No.:
- LE58083ABGC
- Manufacturer:
- Microchip Technology
- Category:
- Telecom
- Package:
- 121-LFBGA
- Datasheet:
-
LE58083ABGC.pdf
- Description:
- IC TELECOM INTERFACE 121BGA
- Quantity:
- Payment:
- Shipping:
Inventory:4,829
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Product details
Overview
LE58083ABGC from Zarlink Semiconductor is an octal low-voltage subscriber line audio-processing circuit (SLAC™) integrating eight independent codec/filter channels with digital two-to-four-wire conversion, A-law/µ-law/linear coding, and software-programmable transhybrid balancing, transmit/receive gain, and impedance scaling - deployed in telephone switch line cards for BORSCHT implementation with Zarlink SLIC devices.
For engineers reviewing the LE58083ABGC datasheet, LE58083ABGC pinout, LE58083ABGC application, or LE58083ABGC equivalent, key selection criteria include PCM/GCI interface mode support, 121-pin BGA package compatibility, 8-channel real-time signal processing capability, chopper clock generation for SLIC devices, and coefficient/software compatibility with VE580 series QLSLAC™ devices.
Technical Context
The LE58083ABGC implements two independent four-channel groups sharing a common PCM/GCI interface and reset, each with dedicated chip select (CS/PG_1, CS/PG_2) for individual programming. It supports dual-mode operation: PCM/MPI mode with up to 128 time slots per port and GCI mode at 2.048 Mbit/s with monitor/SC channel control of paired channels.
Digital signal processing includes programmable FIR/IIR filters (GX, GR, Z, B1/B2, X, R), real-time data registers with interrupt capability (INT_1/INT_2), and mixed-state analog/digital impedance scaling network (AISN). Clocking supports MCLK/PCLK-derived master clocks (1.536–8.192 MHz) in PCM mode or DCL (2.048/4.096 MHz) in GCI mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | 8 independent audio-processing channels, organized as two configurable 4-channel groups |
| Interface Modes | Pin-selectable PCM/MPI or GCI; PCM supports single/dual ports, time slot assignment (≤128 slots/port) |
| Coding Formats | A-law, µ-law, or linear PCM coding - selectable per channel via software configuration |
| Master Clock Range | 1.536, 1.544, 2.048, 3.072, 3.088, 4.096, 6.144, 6.176, or 8.192 MHz - derived from MCLK or PCLK |
| Chopper Clock Output | 256 kHz or 293 kHz - directly drives Zarlink SLIC devices with switching regulators |
| Supply Voltage | 3.3 V CMOS core with 5 V tolerant digital inputs - enables direct interfacing to 5 V microcontrollers |
| Package | 121-pin LFBGA (Green, RoHS-compliant) - footprint optimized for high-density line card layouts |
Pinout & Package
LE58083ABGC is housed in a 121-ball low-profile fine-pitch ball grid array (LFBGA) package measuring 12 mm × 12 mm × 1.0 mm, designed for surface-mount assembly on telecom line cards requiring thermal and electrical integrity across eight analog channels.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN(1–8) | Analog input (channel 1–8) | Eight differential analog inputs from SLIC device receive paths; routed to internal ADCs |
| VOUT(1–8) | Analog output (channel 1–8) | Eight differential analog outputs to SLIC device transmit paths; driven by internal DACs |
| DXA/DU, DRA/DD | PCM transmit/receive data (port A) | Primary PCM highway interface for time-division multiplexed voice/data transfer |
| DXB, DRB | PCM transmit/receive data (port B) | Secondary PCM port supporting dual-port operation and broadcast programming |
| GCI/PCM | Mode selection control | Hardware pin that sets interface mode: high = GCI, low = PCM/MPI |
| CS/PG_1, CS/PG_2 | Chip select / program group | Enables independent configuration of first or second 4-channel group |
| INT_1, INT_2 | Interrupt outputs | Open-drain or TTL-compatible real-time status alerts per 4-channel group |
| MCLK_1, MCLK_2 | Master clock inputs | Provides timing reference for digital filters and PCM interface in PCM/MPI mode |
| PCLK/DCL | PCM clock / GCI clock | Selects clock source: PCLK for PCM mode, DCL for GCI mode (2.048/4.096 MHz) |
| VREF_1, VREF_2 | Analog reference voltages | Stable references for ADC/DAC operation; supports mixed analog/digital impedance scaling |
Key Features
| Feature | Design Value |
|---|---|
| Software & coefficient compatibility with VE580 series | Enables drop-in migration and reuse of existing firmware, filter coefficients, and register maps |
| Programmable digital I/O with debouncing | Configurable GPIO pins support supervision signaling, status monitoring, and hardware handshaking with SLIC devices |
| Real-time data register with interrupt | Delivers instantaneous channel-level status (e.g., clipping, loss-of-signal) without CPU polling overhead |
| Built-in test modes (loopback, tone gen) | Supports factory calibration and field diagnostics without external test equipment |
| Transmit/receive gain & equalization control | Per-channel digital adjustment over ≥12 dB range ensures precise line matching across diverse SLIC implementations |
Applications
| Telephone Switch Line Cards | V.90 Modem Support |
|---|---|
Use Scenario: Integration into central office line cards handling 8 simultaneous POTS lines with BORSCHT functions. IC Role / Device Role / Timing Role: Performs codec, filtering, transhybrid balancing, and PCM framing - replacing discrete analog components and multiple smaller codecs. Use Value: Reduces component count by ~8× versus single-channel solutions while maintaining full per-channel programmability and V.90-compliant channel bandwidth. | Use Scenario: Enabling legacy V.90 analog modem connectivity on modern digital line cards. IC Role / Device Role / Timing Role: Provides maximum channel bandwidth compliant with V.90 specification, including precise group delay and attenuation distortion control. Use Value: Guarantees full 3.4 kHz voiceband fidelity required for 56 kbps downstream modulation without external bandpass filtering. |
| SLIC-Based BORSCHT Systems | Multi-SLIC Supervision Platforms |
Use Scenario: Paired with Zarlink SLIC devices (e.g., LE57D11) to implement complete BORSCHT functionality on a single line card. IC Role / Device Role / Timing Role: Manages SLIC interface signals (CD1–CD2, C3–C7), chopper clock (256/293 kHz), and real-time supervision data exchange. Use Value: Eliminates need for external timing generators or glue logic; supports multiplexed SLIC outputs and mixed-state impedance scaling. | Use Scenario: Centralized supervision of multiple SLIC devices across high-density carrier-grade line cards. IC Role / Device Role / Timing Role: Uses programmable digital I/O with hardware debouncing to monitor hookswitch, battery feed, and ring detect states. Use Value: Enables reliable, noise-immune supervision over long PCB traces without external RC filters or Schmitt triggers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar octal audio-processing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LE58081ABGC | 4-channel variant; identical architecture, pinout, and software compatibility but half the channel count | Suitable for lower-density line cards or cost-sensitive designs where only 4 channels are required | Select when system scale permits channel consolidation or staged deployment |
| VE58083ABGC | Same functional spec and pinout; rebranded VE580-series part with identical QLSLAC™ compatibility and firmware mapping | No functional difference - used interchangeably in new designs targeting VE580 ecosystem | Prefer for new designs aligned with VE580 documentation and toolchain support |
Compared with LE58081ABGC, the LE58083ABGC doubles channel density without increasing board area or interface complexity; compared with VE58083ABGC, it offers identical performance and compatibility but reflects Zarlink's original product branding and datasheet revision history.
Availability
LE58083ABGC is available at Aetrix Electronics and suitable for telephone switch line cards, V.90 modem interfaces, and SLIC-based BORSCHT systems requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for LE58083ABGC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Zarlink Semiconductor was a fabless semiconductor company specializing in communications ICs, acquired by Microsemi in 2011 and later integrated into Microchip Technology; known for high-reliability telecom and timing solutions.
The LE58083ABGC belongs to Zarlink's Octal SLAC™ product line, engineered specifically for cost-effective, software-configurable replacement of discrete analog line card circuitry in carrier-class telephony infrastructure.
FAQ
What is the primary function of the LE58083ABGC in telecom line cards?
The LE58083ABGC performs octal codec/filter and two-to-four-wire conversion functions essential for BORSCHT implementation. It digitizes analog voice signals from SLIC devices, applies programmable digital filtering and transhybrid balancing, encodes using A-law/µ-law/linear formats, and interfaces via PCM or GCI to the host switch fabric - all within a single 121-pin BGA package. Its design replaces multiple discrete components while enabling full per-channel software control.
Does the LE58083ABGC support both PCM and GCI interface modes?
Yes, the LE58083ABGC supports pin-programmable PCM/MPI or GCI interface modes. In PCM/MPI mode, it offers single/dual PCM ports, time slot assignment (up to 128 slots/port), and flexible clock edge options. In GCI mode, it operates at 2.048 Mbit/s with monitor and signaling/control channels managing two channels per GCI link. Mode selection is controlled by the GCI/PCM hardware pin.
Is the LE58083ABGC compatible with VE580 series QLSLAC™ devices?
Yes, the LE58083ABGC is explicitly software and coefficient compatible with the VE580 series QLSLAC™ devices. This includes identical register maps, command structures (e.g., 40h–9Bh coefficient writes), filter coefficient formats, and MPI/GCI protocol behavior - enabling reuse of existing firmware, calibration data, and development tools across both families without modification.
What chopper clock frequencies does the LE58083ABGC generate for SLIC devices?
The LE58083ABGC generates 256 kHz or 293 kHz chopper clock outputs specifically designed to drive Zarlink SLIC devices with integrated switching regulators. These frequencies are selected via software configuration and synchronized to the device's master clock domain, ensuring stable power regulation and minimal noise coupling into analog voice paths.
How is channel grouping implemented in the LE58083ABGC?
The LE58083ABGC organizes its eight channels into two independent four-channel groups (Group 1: CH1–CH4; Group 2: CH5–CH8), each with dedicated chip select (CS/PG_1 or CS/PG_2), interrupt output (INT_1 or INT_2), and shared PCM/GCI interface. This architecture allows individual programming of either group or broadcast configuration to both groups simultaneously using the Channel Enable (EC) register (Commands 4A/4Bh).
LE58083ABGC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 121-LFBGA
- Packaging:
- Tray
- Product Status:
- Obsolete
- Function:
- Subscriber Line Interface Concept (SLIC)
- Interface:
- PCI
- Number of Circuits:
- 1
- Voltage - Supply:
- 3.3V
- Current - Supply:
- -
- Power (Watts):
- -
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 121-LFBGA (10x10)
LE58083ABGC FAQ
1.How can I place an order for LE58083ABGC through Aetrix?
Please submit a Request for Quotation (RFQ) for LE58083ABGC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LE58083ABGC reliable?
The price and inventory of LE58083ABGC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LE58083ABGC is usually 5 days.
3.What payment methods are accepted for LE58083ABGC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LE58083ABGC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LE58083ABGC?
LE58083ABGC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LE58083ABGC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LE58083ABGC?
For technical support, including LE58083ABGC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LE58083ABGC requirements.
6.How does Aetrix verify that LE58083ABGC is sourced from the original manufacturer or authorized distributors?
All LE58083ABGC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LE58083ABGC meets industry standards.
7.What is the process for return or replacement of LE58083ABGC?
All LE58083ABGC units undergo pre-shipment inspection (PSI). If there is an issue with LE58083ABGC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LE58083ABGC part is unused and in its original packaging.
Return procedure for LE58083ABGC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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