Microchip Technology LE58QL02FJCT
- Part No.:
- LE58QL02FJCT
- Manufacturer:
- Microchip Technology
- Category:
- Telecom
- Package:
- 44-LCC (J-Lead)
- Datasheet:
-
LE58QL02FJCT.pdf
- Description:
- IC TELECOM INTERFACE 44PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:1,654
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Product details
Overview
LE58QL02FJCT from Zarlink Semiconductor is a quad low-voltage subscriber line audio-processing circuit (QLSLAC™) designed for telecom line card codec/filter and 2-wire/4-wire conversion. It integrates four independent channels, supports A-law/µ-law/linear coding, operates from 3.3 V CMOS with 5-V tolerant digital inputs, and delivers up to 128 PCM channels per port at 8.192 MHz PCLK - used in telephone switch line cards.
For engineers reviewing the LE58QL02FJCT datasheet, LE58QL02FJCT pinout, LE58QL02FJCT application, or LE58QL02FJCT equivalent, key selection criteria include dual-PCM highway support, software-programmable transhybrid balance and impedance scaling, real-time data register with interrupt, chopper clock generation for SLIC devices, and compatibility with Le79Q02-series coefficient sets.
Technical Context
The LE58QL02FJCT implements four fully independent signal processing channels, each with dedicated VIN/VOUT analog I/O and programmable digital filters for transmit/receive gain, equalization, and transhybrid balancing. Its architecture uses a master clock derived from either MCLK or PCLK (1.536–8.192 MHz) to drive all digital signal processors and time slot assigner logic.
It features a standard serial microprocessor interface (CS/DCLK/DIO/RST/FS), dual PCM highway support with configurable time slot assignment and transmit clock edge selection, and SLIC device interface with five programmable I/O lines per channel - enabling supervision, LED control, and optocoupler operation in BORSCHT implementations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | Four independent, software-configurable audio processing channels |
| PCM Highways | Dual PCM highway support enables simultaneous transmit/receive path separation and flexible time-slot routing |
| Coding Format | A-law, µ-law, or 16-bit linear PCM; 8-bit companded or 16-bit linear per time slot |
| Master Clock Range | 1.536, 1.544, 2.048, 3.072, 3.088, 4.096, 6.144, 6.176, or 8.192 MHz - selectable from MCLK or PCLK |
| Supply Voltage | 3.3 V analog/digital core with 5-V tolerant digital inputs - enables direct interfacing to legacy 5-V microcontrollers |
| Chopper Clock | 256 kHz or 293 kHz output for driving Legerity SLIC switching regulators - critical for efficient BORSCHT power delivery |
| Real-Time Data Register | Interrupt-capable status register (open-drain or TTL output) for monitoring channel activity and SLIC supervision events |
Pinout & Package
LE58QL02FJCT is housed in a 44-pin PLCC (Plastic Leaded Chip Carrier) package with 17.0 mm × 17.0 mm body size and 1.27 mm lead pitch. The package is RoHS-compliant (green) and supplied in tube packaging.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN1–VIN4 | Analog input (channel 1–4) | Receive analog voice signals from SLIC devices; AC-coupled, referenced to VREF |
| VOUT1–VOUT4 | Analog output (channel 1–4) | Deliver processed analog signals to SLIC line drivers; supports hybrid balancing |
| CD11–CD24 | SLIC control data outputs | Four bidirectional control/data lines per channel for SLIC configuration and supervision |
| C31–C54 | Programmable I/O (channel-specific) | Five general-purpose digital I/O pins per channel - used for LED control, optocouplers, debounce inputs |
| PCLK / MCLK/E1 / FS / DCLK / DIO / CS / RST | Microprocessor interface & timing | Serial MPI interface (3-wire + frame sync); supports both standalone and E1-multiplexed operation |
| INT / DXA / DXB / DRB / DRA / TSCA / TSCB | Interrupt & time slot control | Open-drain interrupt output; dual time slot assigner control for independent PCM highway management |
| VCCA / VCCD / AGND / DGND / VREF | Power & reference | Separate analog/digital supplies and grounds minimize noise coupling; internal reference stabilizes ADC/DAC bias |
Key Features
| Feature | Design Value |
|---|---|
| Software programmability | Full channel-level control of SLIC input impedance, transhybrid balance, gain, equalization, and time slot assignment via MPI commands |
| Filter coefficient compatibility | Binary-compatible with Le79Q02/021/031 QSLAC™ devices - enables reuse of existing WinSLAC™-generated coefficients |
| Dual PCM highway | Enables independent transmit/receive path routing and eliminates internal cross-talk in high-density line cards |
| Broadcast programming mode | Single-command initialization of all four channels using Channel Enable register (EC1–EC4), reducing firmware overhead |
| Mixed-state impedance scaling | Combines analog and digital techniques to maintain precise 2-wire termination across temperature and process variation |
| Built-in test capability | On-chip tone generation, loopback paths, and µP-accessible PCM data simplify production testing and field diagnostics |
Applications
| Telephone Switch Line Cards | V.90 Modem Interface |
|---|---|
Use Scenario: Digital line card in central office or remote terminal serving multiple POTS subscribers. IC Role / Device Role / Timing Role: Performs full BORSCHT audio processing - codec, filter, hybrid, and SLIC interface control - for four concurrent subscriber lines. Use Value: Enables single-chip replacement of discrete codec/filter solutions, reducing component count by >70% and supporting 12 dB gain range with guaranteed performance. | Use Scenario: Voiceband modem front-end in DSLAM or integrated access device handling V.90 analog handshake. IC Role / Device Role / Timing Role: Provides maximum channel bandwidth compliant with V.90 specification while maintaining low group delay distortion (<100 µs). Use Value: Delivers <0.5% total harmonic distortion at –10 dBm input and meets ITU-T G.113 echo loss requirements via programmable transhybrid balance. |
| Robbed-Bit Signaling Systems | SLIC-Controlled Supervision Circuits |
Use Scenario: Legacy T1/E1 trunk interface requiring robbed-bit signaling for on-hook/off-hook detection and call progress tones. IC Role / Device Role / Timing Role: Manages PCM highway signaling byte insertion/removal and synchronizes with E1 frame structure using MCLK/E1 pin. Use Value: Supports full robbed-bit compatibility per ITU-T G.704 without external logic; real-time data register flags bit-robbing events for host processor. | Use Scenario: Supervisory monitoring of SLIC device status (battery feed, ring detect, tip/ring reversal) in carrier-grade line cards. IC Role / Device Role / Timing Role: Digitally interfaces with SLIC devices via CD1x/CD2x and C3x–C5x pins to read/write supervision states and control LEDs/optocouplers. Use Value: Eliminates discrete supervision ICs; programmable debounce on one input prevents false hook-switch detection during line transients. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad audio-processing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LE58QL021FJC | Single PCM highway, five programmable I/O per channel, no chopper clock output | Suitable for cost-sensitive line cards where dual-highway routing is unnecessary and SLIC regulation is handled externally | Select when system design uses external DC-DC regulation and requires simplified PCM routing |
| LE58QL031DJC | 32-pin PLCC, single PCM highway, only two programmable I/O per channel, no chopper clock | Targeted at space-constrained, lower-channel-count deployments such as remote DSLAM line cards or VoIP gateways | Select when board area is limited and only two SLIC I/O lines per channel are required |
Compared with LE58QL021FJC and LE58QL031DJC, the LE58QL02FJCT uniquely provides dual PCM highways, chopper clock generation, and four SLIC I/O lines per channel - making it the only option for full-featured, self-contained BORSCHT implementation in high-density central office line cards.
Availability
LE58QL02FJCT is available at Aetrix Electronics and suitable for telephone switch line cards, V.90 modem interfaces, robbed-bit signaling systems, and SLIC-controlled supervision circuits requiring stable component supply and long-term industrial lifecycle support.
Supply support for LE58QL02FJCT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Zarlink Semiconductor was a fabless semiconductor company specializing in communications ICs, later acquired by Microsemi (now part of Microchip Technology). It pioneered highly integrated telecom line interface solutions.
The LE58QL02FJCT belongs to the QLSLAC™ product line, engineered specifically for high-density, software-configurable telephone line cards requiring full BORSCHT functionality with minimal external components.
FAQ
What is the primary function of the LE58QL02FJCT in telecom systems?
The LE58QL02FJCT serves as a quad low-voltage subscriber line audio-processing circuit that performs codec, digital filtering, 2-wire/4-wire conversion, and SLIC interface control. It replaces multiple discrete components in telephone switch line cards, delivering four independent channels with programmable gain, equalization, and transhybrid balance - all within a single 44-pin PLCC package.
Does the LE58QL02FJCT support both A-law and µ-law companding?
Yes, the LE58QL02FJCT supports both A-law and µ-law 8-bit companded PCM coding, as well as 16-bit linear PCM. Coding format is selected via software configuration through the microprocessor interface, and the device maintains full compliance with ITU-T G.711 for both standards across its operating temperature range.
How does the LE58QL02FJCT handle SLIC device interfacing and supervision?
The LE58QL02FJCT interfaces with SLIC devices using dedicated control/data lines (CD1x/CD2x) and five programmable I/O pins (C3x–C5x) per channel. It reads supervision status (e.g., ring detect, battery feed) and drives LEDs/optocouplers directly. Programmable debounce on one input prevents false triggering during line transients - a feature confirmed in the LE58QL02FJCT datasheet Section 3.4.
What clock frequencies does the LE58QL02FJCT support for PCM operation?
The LE58QL02FJCT supports master clock frequencies of 1.536, 1.544, 2.048, 3.072, 3.088, 4.096, 6.144, 6.176, and 8.192 MHz - derived from either the MCLK/E1 or PCLK input. At 8.192 MHz PCLK, it supports up to 128 time slots per PCM port, enabling full E1/T1 frame handling with optional supervision byte insertion.
Is the LE58QL02FJCT pin-compatible with earlier QSLAC™ devices like the Le79Q02?
No, the LE58QL02FJCT is not pin-compatible with Le79Q02-series devices due to differences in package (44-pin PLCC vs. 48-pin TQFP), pin count, and I/O allocation. However, it is software and coefficient compatible - meaning existing WinSLAC™-generated filter coefficients and MPI command sequences can be reused without modification in LE58QL02FJCT-based designs.
LE58QL02FJCT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 44-LCC (J-Lead)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Subscriber Line Interface Concept (SLIC)
- Interface:
- PCM
- Number of Circuits:
- 4
- Voltage - Supply:
- 3.3V
- Current - Supply:
- -
- Power (Watts):
- -
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 44-PLCC (16.59x16.59)
LE58QL02FJCT FAQ
1.How can I place an order for LE58QL02FJCT through Aetrix?
Please submit a Request for Quotation (RFQ) for LE58QL02FJCT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LE58QL02FJCT reliable?
The price and inventory of LE58QL02FJCT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LE58QL02FJCT is usually 5 days.
3.What payment methods are accepted for LE58QL02FJCT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LE58QL02FJCT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LE58QL02FJCT?
LE58QL02FJCT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LE58QL02FJCT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LE58QL02FJCT?
For technical support, including LE58QL02FJCT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LE58QL02FJCT requirements.
6.How does Aetrix verify that LE58QL02FJCT is sourced from the original manufacturer or authorized distributors?
All LE58QL02FJCT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LE58QL02FJCT meets industry standards.
7.What is the process for return or replacement of LE58QL02FJCT?
All LE58QL02FJCT units undergo pre-shipment inspection (PSI). If there is an issue with LE58QL02FJCT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LE58QL02FJCT part is unused and in its original packaging.
Return procedure for LE58QL02FJCT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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