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Microchip Technology LE58QL061BVC
- Part No.:
- LE58QL061BVC
- Manufacturer:
- Microchip Technology
- Category:
- Telecom
- Package:
- 44-TQFP
- Datasheet:
-
LE58QL061BVC.pdf
- Description:
- IC TELECOM INTERFACE 44TQFP
- Quantity:
- Payment:
- Shipping:
Inventory:1,983
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Product details
Overview
LE58QL061BVC from Zarlink Semiconductor is a quad-channel, low-voltage subscriber line audio-processing circuit (QLSLAC™) implementing codec/filter and two-to-four-wire conversion for telecom line cards. It operates on 3.3 V CMOS with 5 V-tolerant digital inputs, supports PCM/MPI or GCI interface modes, delivers 2.048 Mbits/s data rate, and integrates four independent signal processing channels with programmable digital filters and real-time interrupt capability.
For engineers reviewing the LE58QL061BVC datasheet, LE58QL061BVC pinout, LE58QL061BVC application, or LE58QL061BVC equivalent, this device is selected for programmable BORSCHT implementation in carrier-grade line cards requiring software-configurable transmit/receive gains, A-law/µ-law coding, time slot assignment up to 128 per port, and supervision-capable PCM highway operation.
Technical Context
The LE58QL061BVC implements four fully independent digital signal processing channels, each with dedicated transmit and receive paths using programmable FIR/IIR filters for frequency response correction, transhybrid balancing, and equalization. Its architecture supports dual PCM ports or General Circuit Interface (GCI) mode, enabling control and PCM data sharing over a single port at 2.048 MHz or 4.096 MHz clock rates.
It features pin-selectable interface mode (PCM/MPI or GCI), software-programmable SLIC device input impedance and transhybrid balance, and mixed-state analog/digital impedance scaling. Real-time data register with open-drain or TTL interrupt output enables system-level monitoring without CPU polling overhead.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | Four independent, software-configurable audio processing channels for full BORSCHT support |
| Interface Mode | Pin-programmable PCM/MPI or GCI - determines whether control/data share one port (GCI) or use separate lines (PCM/MPI) |
| Data Rate | 2.048 Mbits/s - matches E1/T1 framing for direct integration into telecom line card backplanes |
| Coding Format | A-law, µ-law, or linear PCM - selectable per channel to match regional telephony standards |
| Master Clock Options | 1.536–8.192 MHz (MCLK/PCLK) or 2.048/4.096 MHz (DCL in GCI mode) - enables flexible clock sourcing and jitter tolerance |
| Time Slot Capacity | Up to 128 time slots per port - supports dense channel aggregation in multi-line systems |
| Power Supply | 3.3 V CMOS core with 5 V-tolerant digital I/O - simplifies level-shifting in mixed-voltage line card designs |
Pinout & Package
LE58QL061BVC is housed in a 44-pin Thin Quad Flat Package (TQFP), RoHS-compliant and optimized for high-density line card layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN1–VIN4 | Analog Input (Channel 1–4) | Differential analog inputs from SLIC devices; support mixed-state impedance scaling |
| VOUT1–VOUT4 | Analog Output (Channel 1–4) | Differential outputs driving SLIC line drivers; calibrated for ±1 dB gain accuracy |
| PCLK/DCL | PCM Clock / GCI Data Clock | Configurable as PCM frame sync (PCLK) or GCI bit clock (DCL); supports 2.048/4.096 MHz |
| MCLK/E1 | Master Clock Input | Accepts 1.536–8.192 MHz clock for internal PLL; also serves as E1 reference when enabled |
| GCI/PCM | Interface Mode Select | Hardware pin that configures device for GCI (low) or PCM/MPI (high) operation |
| INT | Interrupt Output | Open-drain or TTL-compatible real-time interrupt signaling channel status changes or errors |
| CS/PG | Chip Select / Page Select | Active-low chip select with page gating for extended register access in MPI mode |
| RST | Hardware Reset | Asynchronous active-low reset that forces device into known standby state |
| FS/FSC | Frame Sync / Frame Sync Control | PCM frame synchronization input; polarity and timing configurable via register |
| DIO/S1 | Data I/O / Serial Port 1 | Bidirectional serial data line in GCI mode; used for monitor channel command transfers |
Key Features
| Feature | Design Value |
|---|---|
| Software & coefficient compatibility with Le79Q061/063 QSLAC | Enables drop-in migration path and reuse of existing filter coefficients and firmware stacks |
| Programmable digital I/O with debouncing | Reduces external logic for SLIC control signals and supports robust key detection in supervisory applications |
| Real-time data register with interrupt | Provides immediate visibility into channel status (e.g., loss-of-signal, clipping) without polling overhead |
| Time slot assigner (128 slots/port) | Allows dynamic allocation of PCM time slots across four channels, supporting mixed-service line cards |
| Built-in test modes (loopback, tone generation) | Enables factory and field diagnostics without external test equipment or host processor intervention |
Applications
| Central Office Line Card | Digital Loop Carrier (DLC) |
|---|---|
Use Scenario: High-density telephone switch line cards handling 4–16 subscriber lines per board. IC Role / Device Role / Timing Role: Performs codec, filter, and 2W/4W conversion for all four channels simultaneously; interfaces directly to Zarlink SLIC devices. Use Value: Replaces four discrete codec-filter ICs while maintaining full software configurability of gain, coding, and impedance - reducing BOM count and PCB area by >60%. | Use Scenario: Remote terminal units aggregating analog POTS lines onto digital T1/E1 trunks. IC Role / Device Role / Timing Role: Provides synchronized PCM framing and time slot assignment across multiple channels for multiplexed upstream transmission. Use Value: Supports robbed-bit signaling and E1 multiplex operation, ensuring compatibility with legacy DLC infrastructure and alarm reporting. |
| V.90 Modem Line Interface | Programmable BORSCHT Module |
Use Scenario: Voiceband modem termination in DSLAMs or integrated access devices supporting V.90/V.92 protocols. IC Role / Device Role / Timing Role: Delivers maximum channel bandwidth compliant with V.90 spec; provides precise group delay and attenuation distortion control. Use Value: Meets V.90 modulation requirements with <0.5 dB gain flatness (300–3400 Hz) and <100 ns group delay variation - enabling full-speed data negotiation. | Use Scenario: Modular BORSCHT subsystems used in softswitch-based media gateways and VoIP edge devices. IC Role / Device Role / Timing Role: Implements full BORSCHT functions (Battery feed, Overvoltage, Ringing, Supervision, Coding, Hybrid) in software-defined manner. Use Value: Enables runtime reconfiguration of line parameters (e.g., ring frequency, supervision thresholds) via µP interface - eliminating hardware variants. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-channel telecom codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LE58QL063HVC | 64-pin LQFP package; adds E1 multiplex support and expanded TSA capacity | Required for systems needing >128 time slots or dual-E1 trunk interfacing | Select LE58QL063HVC only when additional pin resources or E1-specific features are needed; otherwise LE58QL061BVC offers optimal cost and footprint |
| Le79Q061 | Legacy QSLAC device; identical feature set but older process node and higher power consumption | Used in legacy designs where qualification timelines prohibit new component validation | LE58QL061BVC is software and coefficient compatible - ideal for redesigns seeking lower power and RoHS compliance without firmware changes |
Compared with LE58QL063HVC, LE58QL061BVC reduces PCB area by 35% and eliminates unused E1 multiplex logic, lowering static power by 18%; compared with Le79Q061, it achieves 40% lower active current while retaining full register and coefficient compatibility for seamless migration.
Availability
LE58QL061BVC is available at Aetrix Electronics and suitable for central office line cards, digital loop carrier systems, V.90 modem interfaces, and programmable BORSCHT modules requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for LE58QL061BVC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Zarlink Semiconductor was a fabless semiconductor company specializing in high-reliability communications ICs, acquired by Microsemi in 2011. It pioneered SLAC™ and QLSLAC™ architectures for telecom line interface applications.
The LE58QL061BVC belongs to the Ve580 Series QLSLAC™ product line, designed specifically to integrate four-channel audio processing, digital filtering, and SLIC interfacing into a single programmable device for next-generation carrier-class line cards.
FAQ
What is the primary function of the LE58QL061BVC in a telecom line card?
The LE58QL061BVC performs codec/filter and two-to-four-wire conversion functions required for subscriber line interface circuitry. It digitizes analog voice signals into PCM samples and reconstructs them, applying programmable digital filtering for band limiting, transhybrid balancing, and equalization across four independent channels - forming the core audio-processing engine of a BORSCHT implementation.
Does the LE58QL061BVC support both A-law and µ-law companding?
Yes, the LE58QL061BVC supports A-law, µ-law, and linear PCM coding formats, selectable per channel via software configuration. This allows deployment in both European (A-law) and North American (µ-law) telephony environments without hardware change, and maintains full compatibility with legacy QSLAC coefficient sets.
What clock frequencies does the LE58QL061BVC accept for master clock input?
The LE58QL061BVC accepts master clock inputs from 1.536 MHz to 8.192 MHz when derived from MCLK or PCLK in PCM/MPI mode, and supports 2.048 MHz or 4.096 MHz DCL in GCI mode. These options align precisely with E1, T1, and common telecom sampling standards.
How many time slots can the LE58QL061BVC assign per PCM port?
The LE58QL061BVC's time slot assigner (TSA) supports up to 128 time slots per port in PCM/MPI mode. This enables flexible mapping of four channels across standard E1 frames (32 slots) or extended configurations, supporting mixed-service line cards with voice, data, and supervisory channels.
Is the LE58QL061BVC pin-compatible with the Le79Q061 QSLAC device?
No, the LE58QL061BVC is not pin-compatible with the Le79Q061 due to differences in package (44-pin TQFP vs. 64-pin LQFP) and pin assignment. However, it is software and coefficient compatible - meaning existing firmware, filter coefficients, and register maps apply directly, enabling straightforward migration with PCB redesign.
LE58QL061BVC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 44-TQFP
- Packaging:
- Tray
- Product Status:
- Obsolete
- Function:
- Subscriber Line Interface Concept (SLIC)
- Interface:
- PCM
- Number of Circuits:
- 4
- Voltage - Supply:
- 3.3V
- Current - Supply:
- -
- Power (Watts):
- -
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 44-TQFP (10x10)
LE58QL061BVC FAQ
1.How can I place an order for LE58QL061BVC through Aetrix?
Please submit a Request for Quotation (RFQ) for LE58QL061BVC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LE58QL061BVC reliable?
The price and inventory of LE58QL061BVC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LE58QL061BVC is usually 5 days.
3.What payment methods are accepted for LE58QL061BVC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LE58QL061BVC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LE58QL061BVC?
LE58QL061BVC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LE58QL061BVC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LE58QL061BVC?
For technical support, including LE58QL061BVC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LE58QL061BVC requirements.
6.How does Aetrix verify that LE58QL061BVC is sourced from the original manufacturer or authorized distributors?
All LE58QL061BVC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LE58QL061BVC meets industry standards.
7.What is the process for return or replacement of LE58QL061BVC?
All LE58QL061BVC units undergo pre-shipment inspection (PSI). If there is an issue with LE58QL061BVC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LE58QL061BVC part is unused and in its original packaging.
Return procedure for LE58QL061BVC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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