Microchip Technology LE79114KVC

Overview

LE79114KVC from Zarlink Semiconductor is a second-generation VoiceEdge™ Control Processor II (VCP II) designed for POTS line interface control in voice infrastructure systems. It delivers 64-channel call control, 32-channel simultaneous DTMF detection, 4-channel simultaneous line testing, and supports up to 16 Quad ISLAC devices via dual master SPI ports - deployed in DLC, CO, voice-enabled DSLAM, and MSAN systems.

For engineers reviewing the LE79114KVC datasheet, LE79114KVC pinout, LE79114KVC application, or LE79114KVC equivalent, key selection considerations include PCM highway timing recovery, integrated test primitive execution, SPI-based SLAC device orchestration, and VoicePath™ API-II software integration for field-upgradable voice control firmware.

Technical Context

The LE79114KVC implements a DSP core with on-chip memory and dedicated hardware for analog sampling clock generation via internal PLL and network timing recovery. It supports dual slave PCM highways operating up to 16.384 MHz, with optional separate test highway routing.

It integrates a 3.3 V I/O interface with internal 3.3 V-to-1.8 V linear regulator for core logic, and provides 32 GPIOs - 16 configured as chip selects and 16 as interrupt inputs - enabling direct coordination of multiple SLIC/ISLAC devices without host CPU intervention.

Key Specifications

Pinout & Package

LE79114KVC is housed in a 128-pin TQFP (14 mm × 14 mm, 0.4 mm pitch) green RoHS-compliant package with exposed thermal pad.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar voice control processor applications.

Compared with LE79112KVC and LE79116KVC, the LE79114KVC balances channel scalability (64 call + 32 DTMF), dual PCM flexibility, and integrated test capability - making it optimal for mid-to-high density voice access nodes where cost-per-channel and remote diagnostic autonomy are critical.

Availability

LE79114KVC is available at Aetrix Electronics and suitable for Digital Loop Carrier (DLC), Central Office (CO) line cards, and voice-enabled DSLAM applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for LE79114KVC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Zarlink Semiconductor was a fabless provider of communications ICs focused on voice, timing, and RF solutions before its acquisition by Microsemi in 2011.

The VoiceEdge™ Control Processor II product line - including LE79114KVC - was engineered specifically for carrier-grade POTS line interface control with integrated self-test, targeting DLC, CO, and MSAN infrastructure.

FAQ

What is the primary function of the LE79114KVC in a voice access system?

The LE79114KVC serves as a centralized VoiceEdge™ Control Processor II that manages call control, DTMF detection, and line testing across up to 64 POTS lines. It coordinates multiple SLAC devices via SPI and PCM interfaces, offloading these tasks from the host processor. Its integrated test primitives and VoicePath™ API-II enable rapid deployment of field-upgradable voice infrastructure - a core capability of the LE79114KVC.

Does the LE79114KVC support both serial and parallel host interfaces?

Yes, the LE79114KVC supports both serial (SPI, UART, JTAG) and parallel (32-bit HBI host bus interface) host controller connections. The HBI allows memory-mapped or I/O-mode access for high-throughput configuration and status reads, while SPI is used primarily for SLAC device control. This dual-interface flexibility makes the LE79114KVC adaptable to diverse host architectures without redesign - a key advantage of the LE79114KVC.

How many SLAC devices can the LE79114KVC control, and what interface is used?

The LE79114KVC can control up to 16 Quad ISLAC devices - such as the LE79228 - using its two independent master SPI ports and 16 dedicated chip select outputs. Each SPI port supports daisy-chained or individually selected SLACs, enabling scalable line card designs. This SLAC orchestration capability is fundamental to the LE79114KVC's role in high-density voice access systems.

What timing and clocking resources does the LE79114KVC provide internally?

The LE79114KVC integrates a PLL and hardware-based network timing recovery circuit to generate precise analog sampling clocks (e.g., 8 kHz frame sync, 16.384 MHz PCM clocks) directly from network-derived timing references. It does not require external clock synthesizers or jitter cleaners. This internal clock generation is essential for maintaining synchronization across PCM highways and SLAC devices - a defining feature of the LE79114KVC.

Is the LE79114KVC software-upgradable in the field, and how is that implemented?

Yes, the LE79114KVC supports field-upgradable firmware via UART or host bus interface using the VoicePath™ API-II framework. Firmware images are loaded into internal or external memory and activated on reset. This capability allows telecom operators to deploy new features or fix defects post-installation without hardware replacement - a critical operational benefit built into the LE79114KVC architecture.