Microchip Technology LE79R70-1DJC
- Part No.:
- LE79R70-1DJC
- Manufacturer:
- Microchip Technology
- Category:
- Telecom
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
LE79R70-1DJC.pdf
- Description:
- IC TELECOM INTERFACE 32PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:2,079
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LE79R70-1DJC from Zarlink Semiconductor is a bipolar monolithic Ringing Subscriber Line Interface Circuit (RSLIC) designed for short-loop telephony CPE applications. It integrates on-chip trapezoidal-wave ringing, dual battery switching (–40 V to –67 V and –19 V to VBAT1), programmable constant-current feed (18–39 mA), on-chip ring-trip detection, and two relay drivers - enabling cost-effective ISDN terminal adaptors and set-top box designs.
For engineers reviewing the LE79R70-1DJC datasheet, LE79R70-1DJC pinout, LE79R70-1DJC application, or LE79R70-1DJC equivalent, this page delivers verified electrical characteristics, PLCC-32 package mapping, BORSHT function implementation details, and validated alternatives for voice-over-T1/E1, smart residential gateways, and FXS card upgrades.
Technical Context
The LE79R70-1DJC implements full BORSHT functionality in a single IC: battery feed with dual-voltage selection (VBAT1/VBAT2), overvoltage protection via internal clamping, on-chip trapezoidal ringing driven by CMOS-compatible RINGIN input, supervision via loop-current and ground-key detection, hybrid interface with 600 Ω programmable two-wire impedance, and test support through DET output and relay control.
Its bipolar process enables high-voltage operation (–67 V continuous), while integrated features - including internal VEE regulator (no external –5 V required), tip-open state for ground-start lines, polarity reversal option (–1 grade only), and saturation guard resistors (RSGH/RSGL) - reduce external component count and simplify line-card design for IADs, DSL modems, and WLL base stations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Temperature | 0°C to +70°C commercial range - validated per Bellcore GR-357-CORE for telecom reliability. |
| Battery Supply Range | VBAT1: –40 V to –67 V; VBAT2: –19 V to VBAT1 - enables low-power standby via automatic battery switching. |
| Loop Current Accuracy | ±13% in active state; ±20% in standby - supports stable off-hook feed and precise on-hook supervision. |
| Ringing Output | 57–61 Vpk at –67 V VBAT1 into 1570 Ω - meets ITU-T and regional ringing voltage standards. |
| Current Gain | 1000× - defines metallic current (A/B) as 1000 × RSN input current, enabling precise impedance programming. |
| Power Dissipation | Max 1.67 W in PLCC-32 package - thermal resistance θJA = 45°C/W ensures stable operation without forced cooling. |
| Relay Driver Output | 75 mA sink capability per RYOUT1/RYOUT2 - drives standard electromechanical relays without external transistors. |
Pinout & Package
LE79R70-1DJC is housed in a 32-pin Plastic Leaded Chip Carrier (PLCC), polarized revision (Pol. Rev.), green RoHS-compliant package. The PLCC footprint supports automated assembly and provides robust thermal performance for sustained line-card operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A(TIP) | Output amplifier | Drives TIP line with programmable DC feed and AC audio; connects to high-pass filter via HPA. |
| B(RING) | Output amplifier | Drives RING line; paired with A(TIP) for metallic signaling and hybrid balance. |
| VBAT1 / VBAT2 | Battery supplies | VBAT1 powers high-voltage states (ringing, OHT); VBAT2 enables low-power active mode - selected by B2EN logic. |
| RDC / RDCR | Feed programming | RDC sets constant-current loop feed; RDCR provides feedback during ringing waveform generation. |
| RTRIP1 / RTRIP2 | Ring-trip detection | RTRIP1 sets primary threshold; RTRIP2 offsets threshold when switching to VBAT1 for power conservation. |
| RYOUT1 / RYOUT2 | Relay drivers | Open-collector outputs sinking up to 75 mA each; share common emitter RYE tied to relay ground. |
| DET | Status output | Open-collector logic-low indicator for selected detector (ring-trip, ground-key, loop-detect) per C3–C1/E1 decoding. |
| RSN | Summing node | Reference point for receive gain, two-wire impedance, and feed resistance networks - current into RSN × 1000 = metallic current. |
Key Features
| Feature | Design Value |
|---|---|
| On-chip trapezoidal ringing | Eliminates external ringing transformers and discrete timing components - reduces BOM count and board area in ISDN-TA and set-top boxes. |
| Dual-battery switching | Automatically selects VBAT2 for off-hook operation and VBAT1 for on-hook/open-circuit states - cuts standby power by >50% vs. single-battery SLICs. |
| Programmable open-circuit voltage | Adjustable via RSGH resistor - ensures compliance with fax/MTU open-circuit voltage requirements (e.g., ≥42 V) without redesign. |
| Integrated VEE regulator | Generates internal –5 V rail from VNEG - removes need for external negative supply, simplifying power architecture. |
| Ground-key and tip-open detection | Supports ground-start line signaling per ANSI T1.401 - enables reliable connection to legacy POTS infrastructure. |
Applications
| ISDN Terminal Adaptor (TA) | DSL Modem Voice Port |
|---|---|
Use Scenario: Provides analog telephone interface in ISDN-TA units connecting digital ISDN lines to analog handsets or fax machines. IC Role / Device Role / Timing Role: Full BORSHT SLIC handling battery feed, ringing, supervision, hybrid, and test functions - replaces discrete line-card components. Use Value: Enables compact, low-cost TA designs with integrated trapezoidal ringing meeting ITU-T G.961 and regional standards. | Use Scenario: Adds voice port functionality to broadband DSL modems for VoIP or PSTN fallback services. IC Role / Device Role / Timing Role: Acts as FXS interface delivering ringing, loop supervision, and audio coupling - interfaces directly with Zarlink QLSLAC™ codecs. Use Value: Supports simultaneous data+voice operation with <200 mW on-hook power consumption, extending modem thermal margin. |
| Smart Residential Gateway | FXS Card for Enterprise PBX |
Use Scenario: Serves as embedded telephony interface in multi-service gateways combining Wi-Fi, Ethernet, and VoIP. IC Role / Device Role / Timing Role: Manages subscriber line termination including polarity reversal, on-hook transmission, and relay-controlled line seizure. Use Value: Reduces gateway bill-of-materials by integrating relay drivers and battery switching - eliminates 4+ external ICs. | Use Scenario: Implements analog station ports on modular FXS cards used in intelligent PBX systems. IC Role / Device Role / Timing Role: Delivers carrier-grade line feed, ring-trip detection, and longitudinal balance - meets GR-909 and NEBS Level 3 requirements. Use Value: Ensures interoperability with legacy analog phones and fax machines while supporting hot-swap and diagnostics via DET output. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ringing SLIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Zarlink LE79R70-1FQC | Same die, 32-pin QFN package (8×8 mm), exposed thermal pad tied to VBAT1 - higher power dissipation (3.00 W vs. 1.67 W). | Preferred for space-constrained, thermally demanding designs (e.g., dense IADs); requires PCB thermal vias. | Select LE79R70-1FQC when board area or thermal performance outweighs PLCC assembly familiarity. |
| Zarlink LE79R100-1DJC | Higher-performance variant: extended ringing frequency range (up to 30 Hz), improved THD (–64 dB vs. –50 dB), and enhanced longitudinal balance (45 dB vs. 40 dB). | Suitable for premium residential gateways and NGN deployments requiring stricter noise and distortion specs. | Choose LE79R100-1DJC when C-message noise < +10 dBrnC or longitudinal rejection >42 dB is mandatory. |
Compared with LE79R70-1DJC, the LE79R70-1FQC offers superior thermal management in compact layouts but requires QFN reflow expertise, while the LE79R100-1DJC delivers measurable improvements in audio fidelity and noise immunity at higher cost - making LE79R70-1DJC the optimal balance of cost, integration, and proven field reliability for mainstream CPE.
Availability
LE79R70-1DJC is available at Aetrix Electronics and suitable for Integrated Access Devices (IADs), DSL modems, and smart residential gateways requiring stable component supply across multi-year production cycles.
Supply support for LE79R70-1DJC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Zarlink Semiconductor was a fabless semiconductor company specializing in communications ICs, acquired by Microsemi in 2011. Its SLIC portfolio served global telecom infrastructure markets for over two decades.
The LE79R70-1DJC belongs to the VE580 Series RSLIC product line, engineered specifically for cost-sensitive, short-loop customer premises equipment where on-chip ringing and dual-battery efficiency reduce system-level BOM and power costs.
FAQ
What is the maximum continuous operating voltage on VBAT1 for LE79R70-1DJC?
The LE79R70-1DJC supports a continuous VBAT1 voltage range of –40 V to –67 V. Absolute maximum rating allows –80 V for ≤10 ms pulses. This high-voltage tolerance enables compatibility with global central office battery feeds and ensures robust operation under line surges per ITU-T K.20/21. Operation outside this range risks permanent damage to the bipolar output stages.
Does LE79R70-1DJC support polarity reversal, and how is it enabled?
Yes, LE79R70-1DJC supports polarity reversal, but only in the –1 performance grade (denoted by the "-1" suffix). It is enabled via the C3–C1 control inputs: decoding "110" (C3=1,C2=1,C1=0) selects Active Polarity Reversal mode, and "111" selects OHT Polarity Reversal. The feature requires proper external relay sequencing and is validated per ANSI T1.401 Annex A for ground-start line compatibility.
How does the dual-battery switching in LE79R70-1DJC reduce power consumption?
The LE79R70-1DJC reduces standby power by automatically switching from high-voltage VBAT1 (–67 V) to low-voltage VBAT2 (–24 V) during off-hook active states. Since power dissipation scales with V²/R, using VBAT2 cuts feed-stage losses by ~80%. In on-hook standby, it reverts to VBAT1 to meet open-circuit voltage requirements - achieving <100 mW on-hook dissipation per line.
What external components are required to configure the ringing waveform on LE79R70-1DJC?
To configure trapezoidal ringing on LE79R70-1DJC, four external components are mandatory: RRT1 (430 kΩ) and RRT2 (12 kΩ) set ring-trip threshold; CRT (1.5 µF) controls ringing amplitude; RSLEW (150 kΩ) and CSLEW (0.33 µF) shape rise time (~10 ms at 20 Hz). These values are specified in the datasheet's Ring-Trip Components section and must be populated per application voltage and crest factor requirements.
Can LE79R70-1DJC drive standard electromechanical relays directly?
Yes, LE79R70-1DJC can drive standard 5 V or 12 V electromechanical relays directly via its RYOUT1 and RYOUT2 open-collector outputs, each rated for 75 mA sink current and featuring integrated snubber circuits. The common emitter RYE must be connected to relay coil ground, and coil voltage must not exceed +7 V relative to RYE. Zener clamping (6.6–7.9 V) protects against inductive kickback without external diodes.
LE79R70-1DJC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Function:
- Subscriber Line Interface Concept (SLIC)
- Interface:
- 2-Wire
- Number of Circuits:
- 1
- Voltage - Supply:
- 4.75V ~ 5.25V
- Current - Supply:
- -
- Power (Watts):
- -
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (11.43x13.97)
LE79R70-1DJC FAQ
1.How can I place an order for LE79R70-1DJC through Aetrix?
Please submit a Request for Quotation (RFQ) for LE79R70-1DJC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LE79R70-1DJC reliable?
The price and inventory of LE79R70-1DJC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LE79R70-1DJC is usually 5 days.
3.What payment methods are accepted for LE79R70-1DJC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LE79R70-1DJC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LE79R70-1DJC?
LE79R70-1DJC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LE79R70-1DJC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LE79R70-1DJC?
For technical support, including LE79R70-1DJC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LE79R70-1DJC requirements.
6.How does Aetrix verify that LE79R70-1DJC is sourced from the original manufacturer or authorized distributors?
All LE79R70-1DJC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LE79R70-1DJC meets industry standards.
7.What is the process for return or replacement of LE79R70-1DJC?
All LE79R70-1DJC units undergo pre-shipment inspection (PSI). If there is an issue with LE79R70-1DJC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LE79R70-1DJC part is unused and in its original packaging.
Return procedure for LE79R70-1DJC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LE79R70-1DJC Tags

-
LMC567CMX/NOPB
Texas Instruments

-
LM567CMX/NOPB
Texas Instruments

-
LM567CM/NOPB
Texas Instruments

-
VSC8531XMW-02
Microchip Technology

-
VSC8531XMW-05
Microchip Technology

-
GPY115C0VI
MaxLinear, Inc.
-
SI32185-A-FMR
Skyworks Solutions Inc.
-
VSC8541XMV-05
Microchip Technology

-
SI32178-B-FM1R
Skyworks Solutions Inc.

-
GPY215C0VI
MaxLinear, Inc.

-
CPC7514ZTR
Littelfuse Inc.

-
VSC8502XML-03
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
