Microchip Technology LE79R79-2DJC

Overview

LE79R79-2DJC from Zarlink Semiconductor is a bipolar monolithic Ringing Subscriber Line Interface Circuit (RSLIC) designed for short-loop telephony applications. It integrates on-chip trapezoidal ringing, programmable constant-current feed (IL = 20–39 mA), on-hook transmission, and dual battery switching (VBAT1: –40.5 to –75 V; VBAT2: –19 V to VBAT1). It delivers 69 Vpk ringing output into 1570 Ω and supports 63 dB longitudinal balance with polarity reversal - ideal for ISDN-TA, DSL modems, and smart residential gateways.

For engineers reviewing the LE79R79-2DJC datasheet, LE79R79-2DJC pinout, LE79R79-2DJC application, or LE79R79-2DJC equivalent, key selection criteria include confirmed 63 dB longitudinal balance grade, PLCC-32 green RoHS package compatibility, integrated ring-trip and ground-key detection, and verified support for LSSGR five-ringer equivalent compliance in CPE voice interfaces.

Technical Context

The LE79R79-2DJC implements a fully integrated BORSHT architecture with on-chip ringing generation via CMOS-compatible RINGIN input and external RC shaping network. Its dual-battery feed control (B2EN logic-selectable between VBAT1 and VBAT2) enables dynamic power optimization: VBAT2 (–19 V) during off-hook active state minimizes dissipation, while VBAT1 (–75 V) ensures compliant open-circuit voltage (42.8–100 V) and ringing amplitude in standby and OHT states.

It features programmable loop-detect threshold (±20% accuracy), current gain of 1000× at RSN node, two open-collector relay drivers (RYOUT1/RYOUT2, 75 mA sink), and on-chip VEE regulation eliminating need for external –5 V supply. Supervision functions include off-hook detection, ground-key sensing (2–10 kΩ resistive threshold), and ring-trip detection with dual threshold pins (RTRIP1/RTRIP2).

Key Specifications

Pinout & Package

LE79R79-2DJC is housed in a 32-pin Plastic Leaded Chip Carrier (PLCC) green RoHS-compliant package with gull-wing leads and exposed thermal pad (not electrically connected in PLCC variant). Pin 1 is marked for orientation; NC pins are internally unconnected.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ringing SLIC applications.

Compared with LE79R79-1DJC, the LE79R79-2DJC provides superior noise rejection for E1/T1 environments; compared with LE79R100-2DJC, it offers lower system cost and simpler layout but requires external codec coupling via VTX/RSN.

Availability

LE79R79-2DJC is available at Aetrix Electronics and suitable for ISDN terminal adaptors, DSL modems, smart residential gateways, and fixed radio access units requiring stable component supply, long-lifecycle support, and RoHS-compliant green packaging.

Supply support for LE79R79-2DJC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Zarlink Semiconductor was a fabless provider specializing in high-reliability analog and mixed-signal ICs for telecommunications infrastructure, with expertise in SLIC, clock, and RF solutions before acquisition by Microsemi.

The LE79R79 series was engineered specifically for cost-optimized, short-loop CPE voice interfaces - emphasizing integrated ringing, dual-battery efficiency, and programmable supervision to replace discrete linecard implementations.

FAQ

What is the longitudinal balance specification for LE79R79-2DJC?

The LE79R79-2DJC is specified for 63 dB longitudinal balance under normal polarity conditions across 200 Hz to 3.4 kHz. This performance grade meets Bellcore GR-357 and LSSGR requirements for T1/E1 and ISDN applications. The –2 suffix explicitly denotes this 63 dB rating, distinguishing it from the –1 (52 dB) and –3 (52 dB, no polarity reversal) variants. Verified in production test per Bellcore Component Reliability Assurance Requirements.

Does LE79R79-2DJC require an external –5 V supply?

No, LE79R79-2DJC includes an internal VEE regulator that generates the required negative bias from VNEG, eliminating the need for an external –5 V supply. VNEG must be supplied within –4.75 V to VBAT2, and the internal regulator drives all analog circuitry including the A(TIP)/B(RING) amplifiers and RSN node. This reduces system power design complexity and component count.

How does LE79R79-2DJC implement trapezoidal ringing?

LE79R79-2DJC accepts a CMOS-compatible square-wave RINGIN signal (50% duty cycle) and uses an external RC network connected to RINGIN to shape the waveform into a trapezoidal profile. The on-chip ringing amplifier then delivers the shaped signal to the A(TIP)/B(RING) outputs. This method meets ITU-T and ANSI ringing spectral requirements while avoiding bulky external transformers.

What is the function of the B2EN pin on LE79R79-2DJC?

B2EN is the battery select enable input. When B2EN is logic low, LE79R79-2DJC operates from VBAT2 (–19 V), optimizing power during off-hook active states. When B2EN is logic high, it switches to VBAT1 (–75 V) for standby, OHT, and ringing modes - ensuring sufficient open-circuit voltage and ringing amplitude. This dual-battery control is central to the device's power-saving architecture.

Can LE79R79-2DJC support ground-start signaling?

Yes, LE79R79-2DJC supports ground-start signaling via its ground-key detector, enabled by setting E1 = 0. The detector triggers when B(RING) is grounded through a 2–10 kΩ path, and asserts DET output low. For correct operation, VBAT1 must be used in on-hook state (B2EN = high), as specified in SLIC Device Decoding table footnote ** - ensuring adequate voltage headroom for reliable detection.