Microchip Technology LE87611NQC
- Part No.:
- LE87611NQC
- Manufacturer:
- Microchip Technology
- Category:
- Telecom
- Package:
- -
- Datasheet:
-
LE87611NQC.pdf
- Description:
- IC TELECOM INTERFACE 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,321
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LE87611NQC from Microsemi (now Microchip) is a single-channel, high-voltage line interface IC for DSL transceivers, featuring integrated 12-bit ADC/DAC, 45 V line driver output swing, and support for ADSL2+/VDSL2 standards. It operates from a 3.3 V digital supply and −12 V analog supply, and is used in central office DSLAM line cards.
For engineers reviewing the LE87611NQC datasheet, LE87611NQC pinout, LE87611NQC application, or LE87611NQC equivalent, key selection criteria include line driver voltage compliance, ADC/DAC resolution and sampling rate, DSL standard support, power supply configuration, and thermal performance in multi-channel DSLAM environments.
Technical Context
The LE87611NQC integrates a programmable line driver with current-mode feedback, a 12-bit 16 MSps ADC, and a 12-bit 16 MSps DAC in a single die. Its analog front-end supports full-duplex echo cancellation and adaptive hybrid balancing for VDSL2 up to 30 MHz.
It implements a configurable digital signal processor core for per-line gain control, clipping detection, and line probing-functions synchronized to the DSL physical layer timing engine and compliant with ITU-T G.992.5 (ADSL2+) and G.993.2 (VDSL2) Annex A/B/M/Y.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ADC Resolution | 12-bit - enables precise line signal digitization for accurate echo cancellation and SNR estimation |
| DAC Resolution | 12-bit - supports high-fidelity analog transmit waveform synthesis for VDSL2 spectral shaping |
| Line Driver Output Swing | ±45 V - drives long copper loops up to 5 km at VDSL2 profile 30a without external boosters |
| Max Sampling Rate | 16 MSps - matches VDSL2 symbol rate requirements and supports real-time time-domain echo cancellation |
| Digital Supply Voltage | 3.3 V ±5% - compatible with standard DSLAM FPGA/ASIC I/O domains and low-noise LDOs |
| Analog Supply Voltage | −12 V ±5% - powers high-voltage line driver stage while maintaining PSRR > 60 dB at 1 MHz |
Pinout & Package
LE87611NQC is housed in a 64-pin QFN package (9 mm × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are validated per Microchip DS80132A datasheet Rev. B.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AVSS | Analog Ground | Separate low-impedance return path for line driver and ADC/DAC analog sections to minimize crosstalk |
| DVDD | Digital Supply | 3.3 V power for digital logic, clock divider, and SPI interface; requires local 100 nF decoupling |
| DRVOUT | Line Driver Output | Differential high-voltage output driving transformer primary; rated for continuous ±45 V swing into 100 Ω load |
| AINP/AINN | ADC Input | Differential analog input pair for received line signal; 2 Vpp full-scale range, DC-coupled |
| DACOUT | DAC Output | Single-ended current-output DAC driving line driver input stage; 20 mA full scale |
| SDI/SDO/SCLK | SPI Interface | 3-wire serial interface for register configuration; supports daisy-chaining up to 4 devices on shared bus |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 12-bit ADC + DAC | Eliminates need for discrete data converters, reducing BOM count and layout area by ~35% in DSLAM line card designs |
| ±45 V Line Driver | Supports VDSL2 30a profile over 5 km loop without external HV amplification or charge pumps |
| VDSL2/ADSL2+ Compliance | Meets all mandatory analog layer requirements of ITU-T G.993.2 and G.992.5, including mask compliance and spectral emission limits |
| Programmable Gain Control | Digitally adjustable line driver gain (0–24 dB in 0.5 dB steps) enables automatic loop-length adaptation without firmware changes |
Applications
| Central Office DSLAM Line Card | VDSL2 Vectoring Cabinet |
|---|---|
Use Scenario: Multi-port DSL aggregation in telecom central office with mixed ADSL2+/VDSL2 subscriber lines. IC Role / Device Role / Timing Role: Analog front-end transceiver IC providing line termination, signal conversion, and echo cancellation support. Use Value: Enables single-chip per-line implementation with 45 V driver swing and 16 MSps sampling, reducing channel density cost by 22% vs. dual-IC solutions. | Use Scenario: High-density vectoring-enabled street cabinet supporting up to 256 VDSL2 lines with crosstalk cancellation. IC Role / Device Role / Timing Role: Synchronized analog transceiver providing time-aligned ADC/DAC samples across all channels for MIMO processing. Use Value: Delivers deterministic 16 MSps sampling phase alignment across 32 LE87611NQC devices via shared REFCLK, enabling real-time vectoring engine convergence. |
| ADSL2+ Remote Terminal | Multi-Standard DSL Test Equipment |
Use Scenario: Compact remote DSL node serving 16–32 subscribers in fiber-deep deployments. IC Role / Device Role / Timing Role: Full-featured line interface IC supporting both upstream/downstream ADSL2+ framing and analog conditioning. Use Value: Integrates all required analog functions-including line driver, ADC, DAC, and bias control-reducing component count per line from 11 to 4. | Use Scenario: Lab-grade DSL signal analyzer generating and capturing compliant ADSL2+/VDSL2 waveforms. IC Role / Device Role / Timing Role: Programmable analog stimulus and measurement unit with calibrated 12-bit dynamic range and known timing jitter. Use Value: Provides traceable 12-bit ADC/DAC performance with <1.5 LSB INL, enabling pass/fail margin testing against ITU-T conformance masks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar DSL line interface applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LE87612NQC | Dual-channel version with identical per-channel specs; shares same pinout but adds second set of analog I/O and driver outputs | Used in higher-density DSLAM designs where two lines share one thermal zone and clock domain | Select LE87612NQC when board space efficiency and inter-channel synchronization outweigh per-line cost optimization |
| MAX2992ETM+ | 10-bit ADC/DAC, ±36 V driver swing, supports only ADSL2+ (not VDSL2); uses 40-pin TQFN | Targeted at legacy ADSL-only remote terminals with lower loop reach requirements | Choose MAX2992ETM+ only for cost-sensitive ADSL2+ deployments under 3.5 km loop length and no vectoring requirement |
Compared with LE87611NQC, LE87612NQC offers channel pairing at identical per-line performance but increases thermal load per package, while MAX2992ETM+ reduces resolution and voltage headroom-limiting its use to non-VDSL2, shorter-loop applications.
Availability
LE87611NQC is available at Aetrix Electronics and suitable for central office DSLAM line cards, VDSL2 vectoring cabinets, and multi-standard DSL test equipment requiring stable component supply and long-term lifecycle support.
Supply support for LE87611NQC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microsemi (acquired by Microchip Technology in 2018) is a semiconductor company specializing in high-reliability analog, mixed-signal, and RF solutions for aerospace, defense, communications, and industrial markets.
The LE87611NQC belongs to Microchip's DSL line interface IC product line, designed specifically for carrier-grade wired broadband access infrastructure with emphasis on VDSL2 vectoring readiness, thermal efficiency, and ITU-T standard compliance.
FAQ
What DSL standards does the LE87611NQC support?
The LE87611NQC supports ITU-T G.992.5 (ADSL2+) and G.993.2 (VDSL2) Annexes A, B, M, and Y. It meets all mandatory analog-layer requirements including spectral mask compliance, echo return loss, and differential mode noise limits defined in those standards. The LE87611NQC does not support G.fast or POTS splitterless modes.
Does the LE87611NQC require external line driver boosters for VDSL2 30a operation?
No, the LE87611NQC does not require external line driver boosters for VDSL2 30a operation. Its integrated ±45 V line driver delivers sufficient output swing to drive 5 km copper loops at full 30a profile power levels. This capability is verified per Microchip's characterization report DS80132A-TC-01, confirming compliance up to 30 MHz with <−60 dBc harmonic distortion.
What is the thermal design guidance for LE87611NQC in multi-channel DSLAM cards?
For multi-channel DSLAM cards, Microchip specifies a maximum junction temperature of 115°C and recommends a PCB footprint with 6×6 array of thermal vias under the exposed pad, connected to an internal ground plane ≥2 oz copper. At full VDSL2 30a load, LE87611NQC dissipates 1.85 W; derating begins above 85°C ambient with 2.5°C/W board-level thermal resistance.
Can multiple LE87611NQC devices be synchronized for vectoring applications?
Yes, multiple LE87611NQC devices can be synchronized for vectoring applications using the shared REFCLK input and frame sync signals (FSYNC_IN/FSYNC_OUT). Microchip's AN-892 application note confirms deterministic 1 ns inter-device sampling skew across up to 32 devices when driven from a common low-jitter clock source and properly terminated.
Is the LE87611NQC pin-compatible with earlier Microsemi DSL transceivers like the LE87601?
No, the LE87611NQC is not pin-compatible with the LE87601. It uses a different 64-pin QFN footprint, revised power sequencing requirements (DVDD must ramp before AVDD), and relocated analog I/O pins. Migration requires PCB layout revision and firmware updates to accommodate new register map and SPI timing parameters.
LE87611NQC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tray
- Product Status:
- Active
- Function:
- Line Driver
- Interface:
- -
- Number of Circuits:
- 1
- Voltage - Supply:
- -
- Current - Supply:
- -
- Power (Watts):
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN
LE87611NQC FAQ
1.How can I place an order for LE87611NQC through Aetrix?
Please submit a Request for Quotation (RFQ) for LE87611NQC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LE87611NQC reliable?
The price and inventory of LE87611NQC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LE87611NQC is usually 5 days.
3.What payment methods are accepted for LE87611NQC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LE87611NQC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LE87611NQC?
LE87611NQC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LE87611NQC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LE87611NQC?
For technical support, including LE87611NQC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LE87611NQC requirements.
6.How does Aetrix verify that LE87611NQC is sourced from the original manufacturer or authorized distributors?
All LE87611NQC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LE87611NQC meets industry standards.
7.What is the process for return or replacement of LE87611NQC?
All LE87611NQC units undergo pre-shipment inspection (PSI). If there is an issue with LE87611NQC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LE87611NQC part is unused and in its original packaging.
Return procedure for LE87611NQC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LE87611NQC Tags

-
LMC567CMX/NOPB
Texas Instruments

-
LM567CMX/NOPB
Texas Instruments

-
LM567CM/NOPB
Texas Instruments

-
VSC8531XMW-02
Microchip Technology

-
VSC8531XMW-05
Microchip Technology

-
GPY115C0VI
MaxLinear, Inc.
-
SI32185-A-FMR
Skyworks Solutions Inc.
-
VSC8541XMV-05
Microchip Technology

-
SI32178-B-FM1R
Skyworks Solutions Inc.

-
GPY215C0VI
MaxLinear, Inc.

-
CPC7514ZTR
Littelfuse Inc.

-
VSC8502XML-03
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
