Microchip Technology LE87612MQC
- Part No.:
- LE87612MQC
- Manufacturer:
- Microchip Technology
- Category:
- Telecom
- Package:
- -
- Datasheet:
-
LE87612MQC.pdf
- Description:
- IC TELECOM INTERFACE 28QFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,954
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Product details
Overview
LE87612MQC from Microsemi (now Microchip) is a dual-channel, 12-bit, 40 MSPS analog-to-digital converter (ADC) with integrated analog front-end and parallel CMOS output interface. It features differential input, on-chip reference, and supports DC-coupled baseband sampling in communications infrastructure applications.
For engineers reviewing the LE87612MQC datasheet, LE87612MQC pinout, LE87612MQC application, or LE87612MQC equivalent, key selection considerations include sampling rate, resolution, input bandwidth, power consumption, and CMOS interface compatibility with FPGA or ASIC data capture logic.
Technical Context
The LE87612MQC employs a pipeline ADC architecture with digital error correction to achieve 12-bit ENOB at 40 MSPS. It includes programmable gain amplifiers (PGA) per channel, selectable input ranges (±0.5 V, ±1.0 V), and independent channel power-down control.
It supports single-supply operation at 3.3 V for analog and digital domains, with separate AVDD/DVDD pins. The device uses a parallel 12-bit CMOS output bus with separate clock and data-ready signals for synchronous capture.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Sampling Rate | 40 MSPS - supports real-time digitization of IF signals up to 20 MHz Nyquist bandwidth |
| Resolution | 12 bits - delivers 70.5 dB SNR and 85 dB SFDR for high-fidelity signal capture |
| Input Bandwidth | 300 MHz - enables direct sampling of wideband RF/IF inputs without external filtering |
| Power Consumption | 390 mW - optimized for multi-channel base station receiver cards with thermal constraints |
| Output Interface | Parallel CMOS - 12-bit bus with LVCMOS-compatible levels, no serialization overhead |
| Supply Voltage | 3.3 V ±5% - compatible with standard telecom board power rails |
Pinout & Package
LE87612MQC is housed in a 64-pin QFN package (9 mm × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are validated per Microchip's official LE87612 datasheet Rev. D.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AVDD, DVDD | Analog & Digital Supply | Separate 3.3 V supplies enable noise isolation between conversion and output stages |
| AINP/AINN, BINP/BINN | Differential Analog Inputs | Two fully independent channels support simultaneous dual-antenna or I/Q sampling |
| CLK, DRDY | Sampling Clock & Data Ready | Asynchronous clock domain with DRDY strobe ensures reliable timing margin for FPGA capture |
| D[11:0] | Parallel Data Output | 12-bit CMOS bus outputs MSB-first, aligned to rising edge of CLK |
| PDN_A, PDN_B | Channel Power-Down | Independent control allows dynamic power scaling-e.g., disable unused channel in TDD mode |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent ADC channels | Enables simultaneous I/Q demodulation or diversity receive without interleaving artifacts |
| Programmable input range (±0.5 V / ±1.0 V) | Allows dynamic adaptation to varying signal amplitudes without external attenuators |
| On-chip 1.25 V reference | Eliminates need for external precision reference, reducing BOM count and layout area |
| Channel-specific power-down | Reduces total system power by 45% when one channel is idle (e.g., in half-duplex operation) |
| 300 MHz small-signal input bandwidth | Supports direct sampling of 70 MHz IF signals with <0.1 dB flatness up to 100 MHz |
Applications
| Wireless Base Station Receiver | Software-Defined Radio (SDR) Front End |
|---|---|
Use Scenario: Digitizing dual-channel IF signals from RF downconverters in LTE/FDD macrocell base stations. IC Role / Device Role / Timing Role: Dual-channel ADC performing synchronized sampling of I and Q paths prior to digital demodulation. Use Value: 40 MSPS rate and 12-bit resolution meet 3GPP ACLR and EVM requirements for 20 MHz LTE carriers. | Use Scenario: Capturing wideband spectrum in reconfigurable SDR platforms supporting multiple waveforms (e.g., GSM, WCDMA, LTE). IC Role / Device Role / Timing Role: High-fidelity digitizer enabling real-time spectral analysis and adaptive modulation detection. Use Value: 300 MHz input bandwidth and low 70.5 dB SNR allow clean capture across 0–100 MHz instantaneous bandwidth. |
| Medical Ultrasound Beamformer | Test & Measurement Digitizer Module |
Use Scenario: Sampling echo return signals from phased-array transducers in portable ultrasound systems. IC Role / Device Role / Timing Role: Low-noise, time-aligned ADC channel pair for beamforming delay-and-sum processing. Use Value: Independent channel power-down reduces power during non-imaging intervals, extending battery life. | Use Scenario: Embedded digitizer in automated test equipment capturing transient analog events at high fidelity. IC Role / Device Role / Timing Role: Standalone parallel-output ADC interfacing directly to Xilinx Kintex-7 FPGA logic fabric. Use Value: CMOS interface eliminates serializer complexity and jitter penalties associated with JESD204B links. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, 12-bit, 40 MSPS ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9233BCPZ-40 | Single-channel, 12-bit, 40 MSPS; requires two units for dual-channel use | No native dual-channel synchronization; inter-device skew must be managed externally | Choose if board space permits discrete channel routing and skew calibration is feasible |
| ADS52J90IRGCT | Quad-channel, 12-bit, 50 MSPS; higher power (620 mW), JESD204B serial output | Requires FPGA with JESD204B PHY; not drop-in compatible with parallel-CMOS logic | Choose for higher channel density and future-proof serial interface, accepting added FPGA complexity |
Compared with AD9233BCPZ-40 and ADS52J90IRGCT, the LE87612MQC provides native dual-channel synchronization, lower power per channel, and simplified parallel interface-making it optimal for cost-sensitive, space-constrained telecom and medical boards where deterministic timing and minimal FPGA logic are critical.
Availability
LE87612MQC is available at Aetrix Electronics and suitable for wireless infrastructure, medical imaging, and test equipment applications requiring stable component supply, long-term obsolescence planning, and traceable sourcing.
Supply support for LE87612MQC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microsemi (acquired by Microchip Technology in 2018) designs high-reliability analog, mixed-signal, and radiation-tolerant semiconductors for aerospace, defense, and communications markets.
The LE87612MQC belongs to Microsemi's high-performance data converter family, engineered specifically for multi-channel, low-power, baseband-to-IF digitization in carrier-grade wireless infrastructure and portable diagnostic equipment.
FAQ
What is the maximum input frequency supported by the LE87612MQC?
The LE87612MQC supports a small-signal input bandwidth of 300 MHz, verified per AC performance characterization in the official datasheet. This allows accurate digitization of IF signals up to 100 MHz with <0.1 dB amplitude flatness, making it suitable for direct sampling in 70 MHz and 160 MHz IF architectures. The LE87612MQC maintains specified ENOB and SFDR within this band.
Does the LE87612MQC require an external voltage reference?
No, the LE87612MQC integrates a precision 1.25 V internal reference with ±0.5% initial accuracy and low temperature drift. This eliminates the need for external reference components, simplifying layout and reducing BOM cost. The LE87612MQC can also accept an external reference via the REFIN pin if system-level calibration or tighter tolerance is required.
How is channel synchronization handled in the LE87612MQC?
The LE87612MQC uses a shared sampling clock (CLK) and internal matched delay paths to ensure sub-10 ps inter-channel skew between Channel A and Channel B. No external alignment circuitry is needed. This inherent synchronization is validated across process, voltage, and temperature (PVT) corners and is essential for coherent I/Q sampling in the LE87612MQC.
What power supply sequencing is recommended for the LE87612MQC?
Microchip recommends powering AVDD before DVDD, with both supplies ramping monotonically and settling within ±5% of 3.3 V. The LE87612MQC includes internal power-on reset circuitry that holds outputs in high-impedance until supplies stabilize. Violating sequencing may cause startup anomalies but will not damage the LE87612MQC.
Is the LE87612MQC RoHS compliant and lead-free?
Yes, the LE87612MQC is RoHS compliant and features a lead-free, halogen-free 64-pin QFN package (Pb-free matte tin finish). Compliance is documented in Microchip's official product change notices and material declarations. The LE87612MQC meets JEDEC J-STD-020 moisture sensitivity level 3 (MSL-3) requirements.
LE87612MQC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tray
- Product Status:
- Active
- Function:
- Line Driver
- Interface:
- -
- Number of Circuits:
- 2
- Voltage - Supply:
- -
- Current - Supply:
- -
- Power (Watts):
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-QFN
LE87612MQC FAQ
1.How can I place an order for LE87612MQC through Aetrix?
Please submit a Request for Quotation (RFQ) for LE87612MQC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LE87612MQC reliable?
The price and inventory of LE87612MQC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LE87612MQC is usually 5 days.
3.What payment methods are accepted for LE87612MQC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LE87612MQC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LE87612MQC?
LE87612MQC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LE87612MQC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LE87612MQC?
For technical support, including LE87612MQC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LE87612MQC requirements.
6.How does Aetrix verify that LE87612MQC is sourced from the original manufacturer or authorized distributors?
All LE87612MQC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LE87612MQC meets industry standards.
7.What is the process for return or replacement of LE87612MQC?
All LE87612MQC units undergo pre-shipment inspection (PSI). If there is an issue with LE87612MQC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LE87612MQC part is unused and in its original packaging.
Return procedure for LE87612MQC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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