Texas Instruments LF398H

Overview

LF398H from Texas Instruments is a monolithic BI-FET sample-and-hold IC operating as a unity-gain follower with 0.004% typical DC gain accuracy, 20 µs acquisition time to 0.1% with 0.01 µF hold capacitor, and 1 mV typical hold step - used in precision data acquisition systems requiring stable analog signal capture before ADC conversion.

For engineers reviewing the LF398H datasheet, LF398H pinout, LF398H application, or LF398H equivalent, this page delivers verified electrical parameters, functional mode behavior, thermal limits, logic interface thresholds, and real-world trade-offs between hold capacitor selection, droop rate, and dynamic sampling error - all specific to the LF398H variant.

Technical Context

The LF398H implements a bipolar input stage combined with P-channel JFET output devices to achieve low offset voltage (2–7 mV typ), wide bandwidth, and ultralow hold-mode leakage current (30–200 pA). Its differential logic interface accepts TTL/CMOS-level signals with 1.4 V threshold and supports ±5-V to ±18-V dual supplies.

Functional operation is defined by two modes: Sample mode (LOGIC > LOGIC REF by ≥1.4 V) enables output tracking of input via hold capacitor charging; Hold mode (LOGIC < LOGIC REF by ≥1.4 V) disconnects input and maintains output voltage with minimal droop - enabled by high-impedance (>10 GΩ) input and low-output-impedance (0.5–4 Ω) buffer.

Key Specifications

Pinout & Package

LF398H is supplied in an 8-pin hermetically sealed metal can (TO-99) package measuring 9.08 mm × 9.08 mm, rated for 0°C to +70°C ambient operation and featuring low thermal resistance (R_θJC = 20°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar sample-and-hold applications.

Compared with LF398N, the LF398H offers superior thermal performance in compact enclosures due to its TO-99 package, while LF198AN provides higher DC precision at the expense of higher cost and reduced availability - making LF398H the optimal balance of stability, manufacturability, and metrology-grade hold fidelity.

Availability

LF398H is available at Aetrix Electronics and suitable for precision data acquisition, automated test equipment, and aerospace telemetry systems requiring stable component supply across extended production lifecycles.

Supply support for LF398H includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of heritage in precision linear IC design.

The LFx98x product line was engineered specifically for high-fidelity sample-and-hold functions in test instrumentation and military/aerospace signal chains - emphasizing low droop, minimal hold step, and robust logic interface compatibility.

FAQ

What is the maximum recommended hold capacitor value for LF398H?

The LF398H datasheet does not specify an absolute maximum hold capacitor value, but practical limits arise from acquisition time and droop trade-offs. With a 1-µF capacitor, acquisition time extends beyond 100 µs and drive current requirements increase significantly. For most applications, 0.001 µF to 0.1 µF is optimal - balancing speed, droop (<5 mV/min), and stability. Larger values require careful attention to dielectric absorption (polypropylene or C0G ceramic recommended).

Can LF398H operate with single-supply configurations?

No, the LF398H requires dual ±5-V to ±18-V supplies as specified in Absolute Maximum Ratings and Recommended Operating Conditions. Its internal BI-FET architecture depends on symmetrical rails for proper biasing of both input and output stages. Attempting single-supply operation violates the input voltage range constraint (–V_S + 3.5 V ≤ V_IN ≤ +V_S – 3.5 V) and risks latch-up or permanent damage.

How does logic signal slew rate affect LF398H hold step performance?

LF398H requires a minimum dV/dt of 1.0 V/µs on the LOGIC input to minimize hold step. Slower edges cause increased charge injection into the Ch node, raising hold step beyond the typical 1–2.5 mV. This is confirmed in Section 9.1.3 of the datasheet: a 100-ns logic delay combined with 0.6 V/µs input dV/dt yields ~60 mV error - underscoring why fast logic drivers (e.g., 74AC series) are recommended for precision use of LF398H.

Is the OFFSET ADJUST pin on LF398H compatible with standard trimmer potentiometers?

Yes - the OFFSET ADJUST pin is designed for direct connection to the wiper of a 1-kΩ potentiometer, with one end tied to V+ and the other through a resistor to ground to establish ~0.6 mA bias current. This configuration achieves stable offset nulling without degrading input offset drift, as confirmed in the Description and Detailed Description sections of the LF398H datasheet. Avoid using pots >5 kΩ to prevent instability.

What is the thermal derating requirement for LF398H at elevated ambient temperatures?

LF398H has a maximum junction temperature (T_JMAX) of 100°C and a junction-to-ambient thermal resistance (R_θJA) of 85°C/W in its TO-99 package. At 70°C ambient, maximum allowable power dissipation is (100 – 70) / 85 ≈ 353 mW. Since typical supply current is 6.5 mA at ±15 V (195 mW total), thermal headroom remains adequate - but board-level copper area and airflow must be validated per Section 6.3 Thermal Information.