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Texas Instruments LF398M

Part No.:
LF398M
Manufacturer:
Texas Instruments
Category:
Instrumentation, Op Amps, Buffer Amps
Package:
14-SOIC (0.154", 3.90mm Width)
Datasheet:
AetrixLF398M.pdf
Description:
IC SAMPL/HOLD 1 CIRCUIT 14SOIC
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:985

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Product details

Overview

LF398M from Texas Instruments is a monolithic BI-FET sample-and-hold IC operating as a unity-gain follower with 0.004% typical DC gain accuracy, ≤20 µs acquisition time to 0.1% with 0.01 µF hold capacitor, and 1 mV typical hold step at 25°C - used in precision data acquisition systems requiring stable analog signal capture before ADC conversion.

For engineers reviewing the LF398M datasheet, LF398M pinout, LF398M application, or LF398M equivalent, this page delivers verified electrical specs, validated PDIP-8 package mapping, confirmed TTL/CMOS-compatible logic interface behavior, and real-world trade-offs for hold capacitor selection, droop rate, and dynamic sampling error in industrial instrumentation and test equipment design.

Technical Context

The LF398M uses a bipolar input stage combined with P-channel JFET output devices to achieve low input offset voltage (2–7 mV typ), high input impedance (1010 Ω), and low droop rate (5 mV/min with 1 µF capacitor). Its fully differential logic interface has a 1.4 V threshold and supports direct TTL, PMOS, and CMOS drive without level-shifting.

In sample mode, the output tracks the input via active charging/discharging of the external hold capacitor; in hold mode, the input is isolated and the output retains the last sampled voltage with <2.5 mV hold step and >80 dB feedthrough attenuation at 1 kHz - enabled by internal analog switch isolation and high supply rejection (80–110 dB).

Key Specifications

Parameter Value and Actual Design Meaning
Supply Voltage Range ±5 V to ±18 V - supports dual-rail operation across industrial and test equipment power domains.
Acquisition Time ≤20 µs to 0.1% with 0.01 µF hold capacitor - enables sampling of signals up to ~50 kHz bandwidth with minimal settling delay.
Hold Step 1–2.5 mV typical at 25°C, Ch = 0.01 µF - defines minimum resolvable voltage change during hold transition; inversely proportional to capacitor value.
Input Impedance 10 GΩ - allows direct interfacing with high-impedance sensors (e.g., piezoelectric, pH electrodes) without loading error.
Gain Accuracy 0.004% typical, 0.02% max over temperature - ensures sub-16-bit linearity in precision measurement chains.
Leakage Current 30–200 pA into hold capacitor - determines droop-induced error accumulation; critical for long-hold-duration applications (>100 ms).
Logic Threshold 0.8–2.4 V differential - compatible with TTL (2.5 V high), CMOS (5–15 V high), and op-amp logic drivers without external biasing.

Pinout & Package

LF398M is supplied in an 8-pin PDIP (Plastic Dual In-line Package) with nominal body size 9.81 mm × 6.35 mm, designed for through-hole mounting on industrial control and test PCBs.

Pin/Terminal Circuit Role Design Meaning
V+ Positive Supply Accepts +5 V to +18 V; powers internal amplifier stages and logic interface.
OFFSET ADJUST DC Offset Compensation Connects to wiper of 1-kΩ potentiometer between V+ and ground to null input offset without degrading drift performance.
INPUT Analog Input High-impedance (10 GΩ) node accepting –VS+3.5 V to +VS–3.5 V range; directly drives hold capacitor via internal switch.
V– Negative Supply Accepts –5 V to –18 V; establishes reference for bipolar operation and internal biasing.
OUTPUT Analog Output Low-impedance (<4 Ω in hold mode) buffered output; maintains sampled voltage with <5 mV/min droop using 1 µF capacitor.
Ch Hold Capacitor Terminal External capacitor connection point; value selection trades acquisition speed (small C) vs. droop rate (large C).
LOGIC REFERENCE Logic Reference Input Differential reference for LOGIC pin; sets common-mode baseline for TTL/CMOS-compatible switching.
LOGIC Sample/Hold Control Active-high logic input: high = sample (output tracks input), low = hold (output freezes); threshold = 1.4 V differential.

Key Features

Feature Design Value
BI-FET Process Architecture Combines bipolar input stage (low offset, wide bandwidth) with P-channel JFET output (low noise, high temp stability) - avoids MOSFET thermal instability and high-frequency feedthrough.
Unity-Gain Follower Operation Enables direct insertion into feedback loops of 1-MHz op-amps without compensation - supports closed-loop precision integrators and synchronous correlators.
Input Characteristics Stability in Hold Mode No change in input offset, bias current, or impedance during hold - eliminates measurement hysteresis when multiplexing multiple sensors to one LF398M.
Differential Logic Interface 1.4 V threshold with <10 µA input current - permits direct connection to TTL, CMOS, or op-amp logic drivers without pull-ups, level shifters, or timing skew concerns.
Feedthrough Attenuation ≥80 dB at 1 kHz in hold mode - suppresses coupling from logic transients into analog path, critical for sub-mV resolution in DC zeroing applications.

Applications

Staircase Generators Ramp Generators

Use Scenario: Generating precise stepped voltage waveforms for calibration sources and DAC testing.

IC Role / Device Role / Timing Role: Sample-and-hold element that captures and holds successive reference voltages under microcontroller control, stepping output in discrete increments.

Use Value: 0.004% gain accuracy and <2.5 mV hold step ensure monotonic staircase progression with <1 LSB error at 16-bit resolution.

Use Scenario: Creating linear voltage ramps with programmable reset points in function generators and waveform synthesizers.

IC Role / Device Role / Timing Role: Holds reset voltage while integrator charges; released on trigger to initiate new ramp slope.

Use Value: Low droop rate (5 mV/min with 1 µF) sustains ramp linearity over multi-second durations without correction circuitry.

Synchronous Correlators 2-Channel Switches

Use Scenario: Extracting phase-aligned signal components in lock-in amplifiers and RF demodulation circuits.

IC Role / Device Role / Timing Role: Samples input at precise zero-crossing instants synchronized to reference oscillator, freezing signal for downstream multiplication.

Use Value: ≤20 µs acquisition time and high feedthrough rejection (>80 dB) preserve SNR during fast gated sampling windows.

Use Scenario: Alternating between two analog sensor inputs (e.g., temperature and pressure) in shared ADC architectures.

IC Role / Device Role / Timing Role: Acts as channel-selectable analog memory, holding first sensor's value while second is acquired.

Use Value: Input impedance >10 GΩ prevents crosstalk between channels; independent logic control enables deterministic interleaving.

Equivalent & Alternatives

The following parts are listed as comparable options for similar sample-and-hold applications.

Alternative Part Technical Difference Application Difference Selection Advice
LF398N Same electrical specs but rated for 0°C to +70°C ambient (vs. LF398M's military-grade screening); PDIP-8 package identical. Commercial-grade replacement where extended temperature operation is not required. Select LF398N for cost-sensitive industrial designs with standard temp range; verify qualification per MIL-PRF-38535 if military use case applies.
AD585JN Higher acquisition speed (3 µs), lower hold step (0.5 mV), but requires ±15 V only and lacks logic-compatible interface - needs external driver. Better for high-speed data acquisition (≥100 kSPS), less suitable for TTL/CMOS-controlled systems without redesign. Choose AD585JN when acquisition time dominates system performance; avoid if board space or logic integration simplicity is prioritized.

Compared with LF398N, LF398M offers identical functionality with enhanced reliability screening, while AD585JN trades ease of logic integration for raw speed - making LF398M optimal for robust, digitally controlled precision sampling where drop-in compatibility and wide supply flexibility matter most.

Availability

LF398M is available at Aetrix Electronics and suitable for precision data acquisition, automated test equipment, and industrial process monitoring requiring stable component supply across extended lifecycle programs.

Supply support for LF398M includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of heritage in precision linear ICs.

The LF398M belongs to TI's legacy LFx98x monolithic sample-and-hold product line, engineered for ultrahigh DC accuracy and fast acquisition in instrumentation, aerospace, and defense systems where signal integrity under varying thermal and supply conditions is critical.

FAQ

What is the maximum recommended hold capacitor value for LF398M?

The LF398M datasheet does not specify an absolute maximum hold capacitor value, but practical limits arise from acquisition time degradation and droop-current capability. With a 5 mA hold capacitor charging current rating, capacitance exceeding 1 µF significantly increases acquisition time beyond 20 µs and risks thermal stress during rapid sampling. For best performance, TI recommends 0.001 µF to 0.1 µF for high-speed applications and up to 1 µF for low-droop, slow-sampling use cases - always verifying dielectric absorption characteristics of the selected capacitor type.

Does LF398M support single-supply operation?

No, LF398M requires dual symmetric supplies (±5 V to ±18 V) and is not specified for single-supply use. Its internal BI-FET architecture relies on balanced positive and negative rails to maintain input common-mode range (–VS+3.5 V to +VS–3.5 V) and output swing. Attempting single-supply operation violates absolute maximum ratings and causes undefined behavior, including loss of hold fidelity and potential device damage. For single-supply sample-and-hold applications, consider modern alternatives like the LTC1098 or MAX196.

How does logic rise time affect hold step in LF398M?

LF398M requires a minimum logic input dV/dt of 1.0 V/µs to minimize hold step error. Slower edges cause increased charge injection during the logic transition, directly contributing to the 1–2.5 mV typical hold step. This effect is exacerbated by stray capacitance between LOGIC/LOGIC REFERENCE traces and the Ch node. TI recommends routing logic signals away from analog paths, using short traces, and avoiding RC filtering unless compensated - verified in Figure 17 of the LF398M datasheet showing transient response at hold initiation.

Can LF398M be used inside the feedback loop of an op-amp?

Yes, LF398M is explicitly designed for inclusion in op-amp feedback loops, supporting stable operation up to 1 MHz. Its wide bandwidth and input characteristics that remain unchanged in hold mode prevent phase margin erosion. When placed in the feedback path of a high-speed op-amp (e.g., OPA637), the LF398M enables precision programmable-gain or zeroing functions without oscillation - provided layout minimizes capacitive coupling and supply decoupling meets TI's recommendations (100 nF + 10 µF per rail).

What is the junction temperature limit for LF398M?

The maximum junction temperature (TJMAX) for LF398M is 100°C, as specified in Section 6.1 Absolute Maximum Ratings. This limit governs thermal derating: power dissipation must be reduced above ambient temperatures where (TJMAX − TA) / RθJA falls below the package's 500 mW rating. With RθJA = 48.9°C/W for the PDIP-8 package, continuous operation above ~85°C ambient requires forced airflow or heatsinking to avoid thermal shutdown or accelerated parametric drift.

LF398M Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
14-SOIC (0.154", 3.90mm Width)
Packaging:
Tube
Product Status:
Obsolete
Amplifier Type:
Sample and Hold
Number of Circuits:
1
Output Type:
-
Slew Rate:
-
Gain Bandwidth Product:
-
-3db Bandwidth:
-
Current - Input Bias:
10 nA
Voltage - Input Offset:
2 mV
Current - Supply:
4.5mA
Current - Output / Channel:
-
Voltage - Supply Span (Min):
10 V
Voltage - Supply Span (Max):
36 V
Operating Temperature:
0°C ~ 70°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
14-SOIC

LF398M FAQ

1.How can I place an order for LF398M through Aetrix?

Please submit a Request for Quotation (RFQ) for LF398M on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LF398M reliable?

The price and inventory of LF398M are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LF398M is usually 5 days.

3.What payment methods are accepted for LF398M?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LF398M transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LF398M?

LF398M orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LF398M order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LF398M?

For technical support, including LF398M datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LF398M requirements.

6.How does Aetrix verify that LF398M is sourced from the original manufacturer or authorized distributors?

All LF398M products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LF398M meets industry standards.

7.What is the process for return or replacement of LF398M?

All LF398M units undergo pre-shipment inspection (PSI). If there is an issue with LF398M, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LF398M part is unused and in its original packaging.

Return procedure for LF398M:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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