Texas Instruments LF398MX

Overview

LF398MX from Texas Instruments is a monolithic BI-FET sample-and-hold IC operating as a unity-gain follower with 0.004% typical DC gain error, 20 µs acquisition time to 0.1% with 0.01 µF hold capacitor, and 1 mV typical hold step - used in precision data acquisition systems requiring stable analog signal capture before ADC conversion.

For engineers reviewing the LF398MX datasheet, LF398MX pinout, LF398MX application, or LF398MX equivalent, this page delivers verified electrical parameters, validated PDIP-8 package mapping, confirmed TTL/CMOS-compatible logic interface behavior, and real-world trade-offs between hold capacitor value, droop rate, and dynamic sampling error.

Technical Context

The LF398MX uses a bipolar input stage for low offset voltage and wide bandwidth (enabling stable inclusion inside 1-MHz op-amp feedback loops), combined with P-channel JFET output devices to achieve low droop rates (5 mV/min with 1 µF capacitor) and high input impedance (10¹⁰ Ω). Its differential logic interface has 1.4 V threshold and supports direct TTL, PMOS, and CMOS drive without level-shifting.

Functional mode control is strictly voltage-differential: device enters sample mode when LOGIC pin is ≥1.4 V above LOGIC REFERENCE, and hold mode when LOGIC is ≤1.4 V below it. Input-to-output feedthrough is suppressed to 80–90 dB at 1 kHz, and hold capacitor leakage is specified at 30–200 pA at 25°C - critical for long-hold-interval accuracy.

Key Specifications

Pinout & Package

LF398MX is supplied in an 8-pin PDIP (Plastic Dual In-line Package) with nominal body size 9.81 mm × 6.35 mm. Pin 1 is top-left corner when notch faces up; pin numbering proceeds counter-clockwise.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar sample-and-hold applications.

Compared with LF398N, LF398MX offers identical core performance at lower cost and smaller footprint but sacrifices extended temperature and screening compliance; versus AD585JN, LF398MX trades raw speed for broader supply range, differential logic robustness, and superior long-hold stability due to lower leakage.

Availability

LF398MX is available at Aetrix Electronics and suitable for precision data acquisition, automated test equipment, and industrial sensor signal conditioning requiring stable component supply across multi-year production cycles.

Supply support for LF398MX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with over 50 years of innovation in precision signal chain components.

The LF398MX belongs to TI's legacy LFx98x monolithic sample-and-hold family, designed specifically for high-accuracy, low-drift analog capture in test, measurement, and industrial control systems where DC integrity and hold stability outweigh raw speed.

FAQ

What is the maximum recommended hold capacitor value for LF398MX?

The LF398MX datasheet does not specify an absolute maximum hold capacitor value, but practical limits arise from acquisition time and droop trade-offs. With Ch = 1 µF, acquisition time extends beyond 100 µs and droop drops to ~5 mV/min - acceptable for slow-sampling systems. Capacitors >1 µF increase thermal stress on internal JFETs during rapid charging; polypropylene or C0G ceramic types up to 2.2 µF are used in validated designs with derated logic slew rates. Always verify hold step and settling per Figure 5 and Figure 6 in the LF398MX datasheet.

Can LF398MX operate from a single +15 V supply?

No - the LF398MX requires dual symmetric supplies (e.g., ±5 V to ±18 V) as confirmed by Absolute Maximum Ratings (±18 V) and Recommended Operating Conditions (±15 V). Its internal BI-FET architecture relies on balanced positive and negative rails to bias the bipolar input stage and JFET output stage correctly. Attempting single-supply operation will result in clipping, increased offset, or complete failure to enter hold mode. For single-supply applications, consider modern alternatives like the LTC1098 or MAX196, not the LF398MX.

How does logic signal slew rate affect hold step in LF398MX?

LF398MX requires logic edge dV/dt ≥1.0 V/µs to minimize hold step - slower edges cause charge injection into the hold capacitor, increasing step error beyond the typical 1–2.5 mV. This is documented in Section 9.1.3 of the LF398MX datasheet. A 100-ns rise time on a 5-V logic swing meets this requirement; RC-filtered or microcontroller GPIO-driven signals often fall short. Use dedicated logic buffers (e.g., SN74LVC1G04) or Schmitt-trigger gates to ensure clean, fast transitions - especially critical in systems where hold step directly impacts ADC effective resolution.

Is LF398MX pin-compatible with LF198 or LF298?

No - LF398MX (PDIP-8) is not pin-compatible with LF198 (TO-99-8) or LF298 (SOIC-14). While all share the same functional block diagram and logic interface behavior, their pinouts differ fundamentally: LF398MX places V+, OFFSET ADJUST, INPUT, V–, OUTPUT, Ch, LOGIC REFERENCE, and LOGIC on pins 1–8 respectively; LF298 spreads these across 14 pins with NCs and different ordering. PCB redesign is required for substitution. Always consult Pin Configuration tables in respective datasheets - never assume cross-family pin compatibility for the LF398MX.

What is the guaranteed hold time before 1 LSB droop for a 16-bit system using LF398MX?

For a 16-bit system (LSB ≈150 µV at ±10 V full scale), LF398MX leakage current of 200 pA max at 25°C limits hold time with a 0.1 µF capacitor to ≈75 seconds before 150 µV droop (ΔV = I·t/C → t = ΔV·C/I = 150 µV × 0.1 µF / 200 pA). At 70°C, leakage may double, halving hold time. This assumes ideal capacitor dielectric absorption - real-world polypropylene caps add hysteresis error. TI recommends ≤1 s hold for 16-bit accuracy unless actively guarded and temperature-stabilized; always validate with actual board-level testing using the LF398MX.