Texas Instruments LF398N/NOPB

Overview

LF398N/NOPB from Texas Instruments is a monolithic BI-FET sample-and-hold IC operating as a unity-gain follower with 0.004% typical DC gain error, 20 µs acquisition time to 0.1% with 0.01 µF hold capacitor, and 1 mV typical hold step at 25°C - used in precision data acquisition systems requiring stable analog signal capture before ADC conversion.

For engineers reviewing the LF398N/NOPB datasheet, LF398N/NOPB pinout, LF398N/NOPB application, or LF398N/NOPB equivalent, this page delivers verified electrical specs, PDIP-8 package mapping, real-world timing behavior, and substitution guidance for industrial instrumentation and test equipment design.

Technical Context

The LF398N/NOPB uses a bipolar input stage combined with P-channel JFET output devices to achieve low offset voltage (2–7 mV typ), high input impedance (10 GΩ), and low droop rate (e.g., 5 mV/min with 1 µF capacitor). Its differential logic interface accepts TTL/CMOS signals with 1.4 V threshold and operates across ±5 V to ±18 V supplies.

Functional mode switching between sample and hold is controlled by the relative voltage of LOGIC pin to LOGIC REFERENCE pin. During hold, input-to-output feedthrough is suppressed to 80–90 dB at 1 kHz, and output impedance remains low (0.5–4 Ω) to drive 10 kΩ loads without settling degradation.

Key Specifications

Pinout & Package

LF398N/NOPB is packaged in an 8-pin PDIP (Plastic Dual In-line Package) with 9.81 mm × 6.35 mm body size, through-hole mounting, and industry-standard lead pitch (2.54 mm). Pin 1 is marked with a notch or dot; pins are numbered counter-clockwise from top-left when viewed from top.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar sample-and-hold applications.

Compared with LF398H/NOPB, LF398N/NOPB offers lower profile and easier rework but reduced thermal margin; versus AD783JRZ, it provides superior DC accuracy and rail-to-rail analog range at the cost of external component count and board area.

Availability

LF398N/NOPB is available at Aetrix Electronics and suitable for precision instrumentation, automated test equipment, and programmable waveform generation requiring stable component supply across long-lifecycle industrial programs.

Supply support for LF398N/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of heritage in precision signal chain components.

The LFx98x product line was designed specifically for high-accuracy, wide-supply-range sample-and-hold applications in test, measurement, and industrial control - emphasizing DC fidelity, low droop, and logic compatibility over speed.

FAQ

What is the maximum recommended hold capacitor value for LF398N/NOPB?

The LF398N/NOPB datasheet does not specify an absolute maximum hold capacitor value, but practical limits arise from acquisition time and droop trade-offs. With a 1 µF capacitor, acquisition time extends beyond 100 µs and droop drops to ~5 mV/min - acceptable for slow-scan applications. Capacitors larger than 1 µF increase PCB area, cost, and risk of dielectric absorption errors; values above 10 µF are rarely used and require careful layout to avoid instability. For most designs, 0.001–0.1 µF balances speed, accuracy, and size. The LF398N/NOPB itself imposes no hard limit, but system-level performance degrades beyond these ranges.

Can LF398N/NOPB operate from a single +15 V supply?

No, the LF398N/NOPB requires dual-symmetric supplies (e.g., ±15 V) to function correctly. Its internal BI-FET architecture relies on balanced positive and negative rails to maintain input common-mode range, output swing, and bias point stability. Attempting single-supply operation results in clipped output, increased offset, and potential latch-up. While some variants like the LF398A-N share the same constraint, TI does not offer a single-supply version of the LF398N/NOPB. For single-rail systems, consider alternatives such as the AD783JRZ or LTC1098, which are explicitly designed for +5 V operation.

How does hold step in LF398N/NOPB vary with logic signal slew rate?

Hold step in the LF398N/NOPB increases significantly with slower logic edge rates. The datasheet specifies a minimum dV/dt of 1.0 V/µs at the LOGIC pin to limit hold step to its rated 1–2.5 mV. Slower edges cause incomplete switching of internal JFETs during mode transition, resulting in charge injection onto the Ch node. For example, a 0.1 V/µs edge may induce >10 mV hold step - exceeding specification by 4×. This effect is independent of logic voltage levels and occurs even with correct threshold crossing. To ensure compliance, use fast logic drivers (e.g., 74AC series) or add a small RC differentiator at the LOGIC input to sharpen edges without overshoot.

Is OFFSET ADJUST pin on LF398N/NOPB internally buffered?

No, the OFFSET ADJUST pin on the LF398N/NOPB is directly connected to the input stage's nulling network and is not buffered. It presents a high-impedance node (~1 MΩ) that sources/sinks only microamps, but any external capacitance or leakage path will degrade trim stability and temperature drift performance. TI recommends using a low-thermal-EMF 1-kΩ multiturn potentiometer with one end tied to V+ and the other to ground via a resistor set for ~0.6 mA total current - no bypass capacitor should be placed on this pin. Adding capacitance here introduces phase lag and can cause oscillation in closed-loop configurations. The LF398N/NOPB design intentionally avoids buffering to preserve drift characteristics.

What is the guaranteed operating temperature range for LF398N/NOPB?

The LF398N/NOPB is specified for commercial-grade operation from 0°C to +70°C ambient temperature. This range is explicitly stated in Section 6.2 (Recommended Operating Conditions) and Section 6.6 (Electrical Characteristics) of the TI SNOSBI3C datasheet. Junction temperature must not exceed 100°C, and derating applies above 70°C ambient per the R_θJA = 48.9°C/W thermal metric. Unlike military-grade variants (e.g., LF198-N), the LF398N/NOPB is not qualified for extended or industrial temperature ranges. Designs targeting –40°C to +85°C must select alternative parts such as the LF398H/NOPB (TO-99, 0°C to +70°C) or evaluate newer-generation S&H ICs with wider ratings.