STMicroelectronics LK115D30-TR

Overview

LK115D30-TR from STMicroelectronics is a very low dropout (LDO) linear voltage regulator delivering 3.0 V at up to 100 mA output current, featuring 0.2 V typical dropout voltage, ±3% output voltage tolerance at 25 °C, and dual logic-controlled shutdown (active-HIGH on pin 2, active-LOW on pin 3), optimized for battery-powered systems requiring ultra-low quiescent current (0.01 µA in off mode).

For engineers reviewing the LK115D30-TR datasheet, LK115D30-TR pinout, LK115D30-TR application, or LK115D30-TR equivalent, key selection criteria include dropout performance under 60 mA load, SO-8 package thermal behavior, dual-control shutdown timing compatibility, and stability with 2.2 µF ceramic output capacitance.

Technical Context

The LK115D30-TR integrates internal current and thermal limiting, operates across –40 °C to +125 °C junction temperature, and achieves 79 dB supply voltage rejection at 120 Hz with 66 µV RMS output noise (10 Hz–100 kHz). Its dual enable architecture allows flexible system-level power sequencing via independent pin 2 (ON/OFF HIGH) and pin 3 (ON/OFF LOW) control signals.

It requires only a 2.2 µF output capacitor with 0.5–10 Ω ESR for stability and supports input voltages from 4 V to 20 V. Line regulation is 2–10 mV over VI = 4–20 V, and load regulation is 4–20 mV across 0.5–100 mA output current - enabling precision local regulation in noise-sensitive analog and mixed-signal subsystems.

Key Specifications

Pinout & Package

Package: SO-8 (ECOPACK®, lead-free, JEDEC standard MS-012AA). Dimensions: 4.9 mm × 3.9 mm × 1.75 mm (D × E × A), 1.27 mm pitch.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with TLV70030DRVR and NCP114AMX30TBG, the LK115D30-TR uniquely delivers dual-enable control, 0.01 µA shutdown IQ, and integrated thermal protection - making it optimal for long-life, thermally unconstrained, and multi-domain power-gated systems.

Availability

LK115D30-TR is available at Aetrix Electronics and suitable for wearable health monitors, industrial wireless sensor nodes, smart meter RTC backup circuits, and automotive BCM subsystems requiring stable component supply, consistent parametric performance, and long-term production continuity.

Supply support for LK115D30-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, analog chips, and MEMS sensors for industrial, automotive, and consumer markets.

The LK115XX series targets ultra-low-power, high-reliability local regulation in space-constrained, battery-operated, and thermally demanding applications - emphasizing dropout efficiency, shutdown flexibility, and minimal external component count.

FAQ

What is the minimum input voltage required for regulation at full 100 mA load?

The LK115D30-TR maintains 3.0 V output with ≤3% error when input voltage is ≥3.17 V at 60 mA (typical 0.17 V dropout), and ≥3.2 V at 100 mA based on load regulation data. For guaranteed 100 mA operation across temperature, VI ≥3.25 V is recommended to accommodate worst-case dropout and line/load variation.

Can pins 6, 7, and 8 be connected to ground or left floating in PCB layout?

Pins 6, 7, and 8 are internally no-connect (NC) and must remain unconnected - neither grounded nor routed. ST's mechanical drawings and electrical schematics confirm zero internal connectivity. Grounding NC pins risks parasitic coupling or ESD path disruption; best practice is to omit copper pads or isolate them completely.

Does the LK115D30-TR require an input bypass capacitor?

Yes - a 0.1 µF ceramic capacitor is specified in the test circuits and recommended at the IN pin, placed within 3 mm of the device. This stabilizes input impedance, suppresses high-frequency noise from upstream sources, and prevents oscillation during fast load transients, especially when fed from high-impedance sources like battery+filter networks.

How does the dual-enable truth table affect system power sequencing?

The truth table defines four states: (H,L)=ON, (H,H)=OFF, (L,L)=OFF, (L,H)=not allowed. This allows hierarchical control - e.g., pin 2 driven by system PMIC for coarse power gating, while pin 3 driven by MCU GPIO for fine-grained peripheral enable. The forbidden (L,H) state prevents undefined behavior and must be avoided in firmware and hardware design.