Texas Instruments LM10692RMYT
- Part No.:
- LM10692RMYT
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 36-VFQFN Exposed Pad
- Datasheet:
-
LM10692RMYT.pdf
- Description:
- IC REG CONV SSD 6OUT 36VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:245
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LM10692RMYT from Texas Instruments is a fully integrated power management unit (PMU) designed specifically for SandForce SF3700 SSD controllers. It integrates six SPI/I²C-programmable buck regulators, delivers up to 95% efficiency, operates at 2 MHz switching frequency, and uses a 36-pin 5 × 5 mm QFN package to power NAND flash and controller rails in M.2 SSDs.
For engineers reviewing the LM10692RMYT datasheet, LM10692RMYT pinout, LM10692RMYT application, or LM10692RMYT equivalent, key selection considerations include I²C-programmable output voltages (0.8–3.3 V), per-rail enable/PG signals, bypass mode on Buck1 for 3.3 V M.2, phase-shifted operation to reduce input ripple, and thermal/overcurrent protection tailored for SSD power sequencing.
Technical Context
The LM10692RMYT implements six synchronous buck regulators with independent feedback loops, programmable via I²C interface to support dynamic voltage scaling (DVS) across AON and CPE domains. Each regulator features automatic soft-start, fast active discharge, and PFM mode for light-load efficiency.
It supports customizable startup sequencing, includes dedicated PFAIL monitoring for input power integrity, and integrates fast-turn-on control with no external loop compensation required-enabling compact, high-bandwidth regulation for SSD subsystems requiring tight voltage accuracy (±1%) and low quiescent current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Regulator Count | Six independent synchronous buck regulators |
| Switching Frequency | 2 MHz - enables use of small 1.0–2.2 µH inductors |
| Feedback Accuracy | ±1% - ensures stable, precise rail regulation under load transients |
| Max Efficiency | 95% - minimizes thermal dissipation in space-constrained M.2 modules |
| Output Voltage Range | 0.8 V to 3.3 V - covers all SF3700 controller and NAND I/O/core rails |
| Package | 36-pin QFN, 5 mm × 5 mm - surface-mount, thermally enhanced for SSD PCBs |
| Buck1 Bypass Mode | 2.5 A at 2.85/3.3 V - eliminates inductor for standard M.2 3.3 V supply |
Pinout & Package
LM10692RMYT is housed in a thermally optimized 36-pin QFN package (5 mm × 5 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per TI SLPT043 documentation and validated for SandForce SF3700 reference designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| B1_SW, B2_SW, ..., B6_SW | High-side switch node | Connects to external inductor; supports phase-shifted switching to reduce input ripple |
| B1_FB, B2_FB, ..., B6_FB | Feedback input | Monitors regulated output voltage; ±1% accuracy enables tight margining |
| EN_AON, EN_CPE | Enable control inputs | Independent activation of AON (always-on) and CPE (core power) rail groups |
| PG_AON, PG_CPE | Power good outputs | Open-drain status signals confirming regulation stability per domain |
| SCL, SDA | I²C interface | Two-wire bus for real-time DVS, sequencing control, and fault reporting |
| PFAIL | Input power fail monitor | Asserts low when AVIN drops below threshold - triggers controlled shutdown |
| VIN_MODE | Mode select | Configures Buck1 for buck or bypass operation (3.3 V M.2 compliance) |
| PGND / AGND | Ground terminals | Separate power and analog ground pins minimize noise coupling in mixed-signal SSD systems |
Key Features
| Feature | Design Value |
|---|---|
| I²C-programmable DVS | Enables runtime voltage adjustment across all six rails to match NAND/controller state transitions |
| Per-rail enable & PG | Allows independent power-up sequencing and fault isolation between AON and CPE domains |
| Buck1 bypass mode | Eliminates inductor for 3.3 V M.2 applications - reduces BOM count and board area |
| Phase-shifted operation | Reduces peak input current by up to 50%, enabling smaller input capacitors (e.g., 22 µF instead of 47 µF) |
| Integrated thermal/OC protection | Auto-shutdown prevents damage during NAND program/erase surges or ambient temperature rise |
Applications
| M.2 NVMe SSD Module | Enterprise SATA SSD |
|---|---|
Use Scenario: Compact M.2 2280 form factor SSD used in ultrabooks and thin clients. IC Role / Device Role / Timing Role: PMU supplying 2.85 V/2.5 A (CPE), 1.8 V/200 mA (AON), and 1.1 V/800 mA (AON) to SF3700 controller and NAND I/O. Use Value: Buck1 bypass mode eliminates inductor; 2 MHz switching allows 1.0 µH inductors - shrinking total solution size to 13.5 mm × 9.3 mm. | Use Scenario: High-reliability 2.5-inch SATA SSD deployed in data center storage arrays. IC Role / Device Role / Timing Role: Centralized power source managing six independent rails with sequencing, PGOOD monitoring, and PFAIL detection. Use Value: Independent EN/PG pins enable staggered power-up to limit inrush; thermal protection prevents field failures during sustained write workloads. |
| Industrial Embedded SSD | Edge AI Accelerator Storage |
Use Scenario: Ruggedized SSD operating in extended temperature range (−40°C to +85°C) inside factory automation controllers. IC Role / Device Role / Timing Role: Power manager delivering 1.8 V/2.5 A (CPE) and 1.1 V/2.5 A (CPE) with fast active discharge for safe hot-swap capability. Use Value: Low quiescent current extends battery-backed operation; PFM mode maintains >85% efficiency at 10 mA loads during idle states. | Use Scenario: Co-located SSD paired with FPGA-based AI inference engine on edge gateway PCB. IC Role / Device Role / Timing Role: Regulating 2.5 V/200 mA (AON) for controller logic and 1.8 V/200 mA (AON) for interface buffers while coordinating sleep/wake via I²C. Use Value: Sleep mode activated over I²C reduces system standby power by >60%; programmable sequencing avoids timing conflicts during FPGA reconfiguration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PMU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65988ARSLR | USB-C PD port controller with integrated buck-boost; lacks six independent buck regulators and SF3700-specific sequencing | Targeted at USB-C host systems, not SSD controller PMUs | Not suitable for SandForce SF3700-based SSDs due to incompatible rail count, control interface, and sequencing architecture |
| RTQ2134B-QA | Quad-channel buck PMIC with I²C interface; supports only four rails, no bypass mode, and no PFAIL monitoring | Designed for automotive infotainment SoCs, not SSDs | May power basic NAND+controller combos but cannot replicate LM10692RMYT's AON/CPE domain separation or M.2-optimized features |
Compared with TPS65988ARSLR and RTQ2134B-QA, the LM10692RMYT uniquely delivers six independently controllable, SF3700-optimized rails in a single 5 × 5 mm QFN - including bypass mode, per-domain PG/EN, and PFAIL - making it irreplaceable for M.2 SSDs using SandForce controllers.
Availability
LM10692RMYT is available at Aetrix Electronics and suitable for M.2 SSD design, enterprise storage development, and industrial embedded SSD production requiring stable component supply and long-term lifecycle support.
Supply support for LM10692RMYT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and power management technologies, with decades of leadership in high-efficiency power conversion.
The LM10692RMYT belongs to TI's SSD-optimized PMU product line, engineered to replace discrete DC/DC solutions in M.2 and mSATA solid-state drives using SandForce SF3700 controllers - emphasizing integration, sequencing control, and thermal robustness.
FAQ
What is the primary function of the LM10692RMYT in an SSD system?
The LM10692RMYT serves as a fully integrated power management unit for SandForce SF3700 SSD controllers. It supplies six precisely regulated voltage rails-including 2.85 V/2.5 A (CPE), 1.8 V/200 mA (AON), and 1.1 V/800 mA (AON)-while enabling dynamic voltage scaling, sequencing, and fault monitoring. The LM10692RMYT replaces up to six discrete regulators, reducing board area and improving reliability in M.2 SSDs.
Does the LM10692RMYT support I²C or SPI communication?
The LM10692RMYT supports I²C communication (SCL/SDA pins) for programming output voltages, configuring sequencing, enabling sleep mode, and reading fault status. Although early documentation mentions SPI programmability, TI's official datasheet and SLPT043 reference design confirm I²C as the sole supported digital interface for the LM10692RMYT. No SPI pins or protocol implementation exist on this device.
What is the purpose of Buck1 bypass mode in the LM10692RMYT?
Buck1 bypass mode in the LM10692RMYT disables the internal switch and connects AVIN directly to the output, delivering up to 2.5 A at 2.85 V or 3.3 V without an inductor. This feature satisfies M.2 specification requirements for 3.3 V VCC power while eliminating inductor cost, footprint, and EMI concerns. The mode is selected via the VIN_MODE pin and is exclusive to Buck1 - other regulators operate only in buck mode.
How does the LM10692RMYT handle power sequencing for AON and CPE domains?
The LM10692RMYT provides independent enable (EN_AON, EN_CPE) and power-good (PG_AON, PG_CPE) signals for its two power domains. Sequencing is implemented externally via controller logic or simple RC delays, as the LM10692RMYT itself does not embed programmable delay timers. This architecture allows flexible, application-specific startup order - for example, asserting EN_AON first to power always-on logic before enabling EN_CPE for core processing rails - ensuring safe SF3700 initialization.
Is the LM10692RMYT pin-compatible with other TI PMUs like the LM10691?
No, the LM10692RMYT is not pin-compatible with the LM10691 or any other TI PMU. It uses a unique 36-pin QFN layout optimized for SF3700 SSD layouts, with dedicated pins for PFAIL, VIN_MODE, and separate AON/CPE enable and PG signals. The LM10691 is a different product with distinct pin count, function allocation, and target controller - attempting substitution would require full PCB redesign. Always verify pinout against TI SLPT043 for the LM10692RMYT.
LM10692RMYT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 36-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Converter, Solid State Drives
- Voltage - Input:
- 2.5V ~ 5.5V
- Number of Outputs:
- 6
- Voltage - Output:
- Multiple
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 36-VQFN (5x5)
LM10692RMYT FAQ
1.How can I place an order for LM10692RMYT through Aetrix?
Please submit a Request for Quotation (RFQ) for LM10692RMYT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM10692RMYT reliable?
The price and inventory of LM10692RMYT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM10692RMYT is usually 5 days.
3.What payment methods are accepted for LM10692RMYT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM10692RMYT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM10692RMYT?
LM10692RMYT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM10692RMYT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM10692RMYT?
For technical support, including LM10692RMYT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM10692RMYT requirements.
6.How does Aetrix verify that LM10692RMYT is sourced from the original manufacturer or authorized distributors?
All LM10692RMYT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM10692RMYT meets industry standards.
7.What is the process for return or replacement of LM10692RMYT?
All LM10692RMYT units undergo pre-shipment inspection (PSI). If there is an issue with LM10692RMYT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM10692RMYT part is unused and in its original packaging.
Return procedure for LM10692RMYT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LM10692RMYT Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

